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,@,`,,,"radeon_emit_packetsradeon_check_and_fixup_packetsradeon_check_and_fixup_offsetradeon_emit_packet3radeon_check_and_fixup_packet3radeon_emit_packet3_cliprectradeon_emit_clip_rectradeon_emit_waitradeon_cp_vertex2radeon_emit_state2radeon_emit_stateradeon_cp_dispatch_indicesradeon_cp_dispatch_indirectradeon_cp_dispatch_vertexradeon_cp_textureradeon_cp_dispatch_textureradeon_cp_indirectradeon_cp_stippleradeon_cp_dispatch_stippleradeon_cp_indicesradeon_cp_vertexradeon_cp_clearradeon_cp_dispatch_clearradeon_cp_swapradeon_cp_dispatch_swapradeon_clear_boxradeon_cp_discard_bufferradeon_driver_openradeon_mem_allocradeon_mem_freeradeon_mem_init_heapradeon_enable_vblankradeon_disable_vblankradeon_get_vblank_counterradeon_irq_emitradeon_emit_irqradeon_irq_waitradeon_vblank_crtc_setr300_do_cp_cmdbufr300_emit_packet0r300_emit_carefully_checked_packet0r300_emit_vpur300_emit_packet3r300_emit_clearr300_emit_r500fpr300_emit_cliprectsr300_emit_raw_packet3r300_emit_3d_load_vbpntrr300_emit_bitblt_multir300_emit_draw_indx_2r300_cmd_waitr300_scratchr300_pacifyr600_page_table_initr600_do_cleanup_cpr600_do_init_cpr600_do_resume_cpr600_do_cp_idler600_do_cp_startr600_do_cp_resetr600_do_cp_stopr600_cp_dispatch_indirectr600_cp_dispatch_swapr600_cp_dispatch_texturer600_cs_legacy_ioctlr600_cs_id_emitradeon_atombios_initR100RV100RS100RV200RS200R200RV250RS300RV280R300R350RV350RV380R420R423RV410RS400RS480RS600RS690RS740RV515R520RV530RV560RV570R580R600RV610RV630RV670RV620RV635RS780RS880RV770RV730RV710RV740CEDARREDWOODJUNIPERCYPRESSHEMLOCKPALMSUMOSUMO2BARTSTURKSCAICOSCAYMANARUBATAHITIPITCAIRNVERDELASTradeon_device_initradeon_debugfs_add_filesradeon_invalid_wregradeon_invalid_rregradeon_info_ioctlradeon_get_vblank_counter_kmsradeon_enable_vblank_kmsradeon_disable_vblank_kmsradeon_get_vblank_timestamp_kmsradeon_cp_init_kmsradeon_cp_start_kmsradeon_cp_stop_kmsradeon_cp_reset_kmsradeon_cp_idle_kmsradeon_cp_resume_kmsradeon_engine_reset_kmsradeon_fullscreen_kmsradeon_cp_swap_kmsradeon_cp_clear_kmsradeon_cp_vertex_kmsradeon_cp_indices_kmsradeon_cp_texture_kmsradeon_cp_stipple_kmsradeon_cp_indirect_kmsradeon_cp_vertex2_kmsradeon_cp_cmdbuf_kmsradeon_cp_getparam_kmsradeon_cp_flip_kmsradeon_mem_alloc_kmsradeon_mem_free_kmsradeon_mem_init_heap_kmsradeon_irq_emit_kmsradeon_irq_wait_kmsradeon_cp_setparam_kmsradeon_surface_alloc_kmsradeon_surface_free_kms     radeon_get_atom_connector_info_from_supported_devices_tableradeon_atombios_sideport_presentradeon_atombios_get_tmds_inforadeon_atombios_get_asic_ss_inforadeon_atombios_get_lvds_inforadeon_atombios_get_tv_inforadeon_atom_get_max_vddcradeon_atom_set_voltageradeon_atombios_connected_scratch_regsradeon_agp_initdce4_crtc_do_set_baseavivo_crtc_do_set_baseatombios_crtc_set_disp_eng_pllatombios_adjust_pllatombios_crtc_program_pllradeon_combios_get_tv_info(w)Vxwxxxx. ? . ? : ? . ? : ? <?2:  :U  :U     radeon_legacy_get_tmds_info_from_combiosradeon_legacy_get_ext_tmds_info_from_combiosradeon_get_legacy_connector_info_from_biosradeon_combios_external_tmds_setupradeon_combios_connected_scratch_regsatom_execute_table_lockedatom_get_src_intatom_put_dstatom_op_jumpatom_allocate_fb_scratchradeon_ttm_backend_bindradeon_ttm_global_initradeon_ttm_initradeon_move_blitradeon_init_mem_typeradeon_bo_createradeon_bo_get_surface_reg radeon_crtc_do_set_baseradeon_crtc_mode_setradeon_set_crtc_timingradeon_set_pllradeon_legacy_backlight_initradeon_legacy_lvds_updateradeon_legacy_primary_dac_mode_setradeon_legacy_tmds_int_mode_setradeon_legacy_lvds_mode_setradeon_legacy_lvds_dpmsradeon_legacy_tmds_int_dpmsradeon_legacy_primary_dac_dpmsradeon_legacy_tv_detectr300_legacy_tv_detectradeon_legacy_tv_dac_mode_setradeon_legacy_tv_dac_dpmsradeon_legacy_tmds_ext_mode_setradeon_legacy_tmds_ext_dpms XP Vx@8radeon_vga_detectradeon_fixup_lvds_native_moderadeon_fp_native_moderadeon_dvi_detectradeon_connector_analog_encoder_conflict_solveradeon_lvds_set_propertyradeon_add_atom_connectorradeon_add_legacy_connectorradeon_encoder_set_active_devicedce5_crtc_load_lutdce4_crtc_load_lutavivo_crtc_load_lutradeon_compute_pll_avivoradeon_compute_pll_legacyradeon_crtc_page_flipradeon_unpin_work_funcradeon_crtc_scaling_mode_fixupradeon_crtc_cursor_setradeon_crtc_cursor_moveradeon_i2c_creater100_hw_i2c_xferradeon_get_i2c_prescaler500_hw_i2c_xferradeon_hw_i2c_xferradeon_i2c_get_byteradeon_i2c_put_byteradeonfb_createradeon_gem_object_createradeon_gem_pread_ioctlradeon_gem_pwrite_ioctlradeon_gem_set_tiling_ioctlradeon_gem_get_tiling_ioctlradeon_ring_writeradeon_ib_scheduleradeon_ib_pool_initradeon_cs_parser_relocsradeon_cs_parser_initradeon_cs_get_ringradeon_cs_ioctlradeon_cs_ib_chunkradeon_cs_ib_vm_chunkradeon_get_biosradeon_atrm_get_biosradeon_acpi_vfct_biosL06@8>BKPOYk0u~radeon_benchmarkradeon_benchmark_moveradeon_benchmark_do_mover100_reloc_pitch_offsetr100_packet3_load_vbpntrr100_page_flipr100_pm_get_dynpm_stater100_pm_miscr100_irq_processr100_copy_blitr100_cp_initr100_cp_init_microcoder100_cp_finir100_cs_packet_parser100_cs_packet_parse_vliner100_cs_packet_next_relocr100_cs_track_check_pkt3_indx_bufferr100_cs_parser100_packet0_checkr100_packet3_checkr100_asic_reset008<r100_set_surface_regr100_bandwidth_updater100_cs_track_checkr100_cs_track_texture_checkr100_cs_track_cuber100_cs_track_texture_printr100_ring_testr100_ib_testrv370_pcie_gart_initr300_asic_resetr300_cs_parser300_packet0_checkr300_packet3_check0?|x HP8 r420_debugfs0?|x HP8  rs400_gart_adjust_sizers400_gart_initrs600_page_fliprs600_pm_miscrs600_asic_resetrs600_irq_processrs600_debugfs0?|x HP8  rs690_pm_inforv515_debugfs0?|8 HP8 ?r600_pm_get_dynpm_stater600_pm_miscr600_init_microcoder600_cp_startr600_ring_testr600_startupr600_resumer600_initr600_ib_testr600_ih_ring_allocr600_irq_setr600_irq_processrv770_page_fliprv770_pm_miscrv770_resumerv770_startupradeon_test_movesradeon_test_ring_syncradeon_test_ring_sync2r200_copy_dmar200_packet0_check0~<???c$ k*6 mc8*1 X|1 w* O"|81C   ! !  !@" "0" X-8x P[ Xx,8| f X-Hyc [ Xk-Hy radeon_legacy_tv_init_restarts  '''r600_cs_packet_parser600_packet0_checkr600_cs_parser600_cs_packet_parse_vliner600_packet3_checkr600_cs_packet_next_reloc_mmr600_cs_track_checkr600_cs_track_validate_cbr600_cs_track_validate_db? {ݜ?r600_check_texture_resourcer600_cs_legacyr600_cs_packet_next_reloc_nommr600_prepare_blit_copyr600_nomm_get_vbTTTTTTTT8$$($$$$8$8$00(00(00<<0<(((((((((((((( set_default_stateset_shaderscp_set_surface_syncr600_done_blit_copyset_tex_resourceset_render_targetset_scissorsset_vtx_resourcedraw_auto   <  @ <h(hhBhhc@h hBoi *ii iiC`iQi i i ii i@ ????????????????i@Qi -????ii~ii%i)i7iiiiiiiiDiiii in$(hhBhhch hoi *ii iiC`@iQii iH???ii i@ ????????????????i@i -????ii~ii%i)i7iiiiiiiiDiiii inr600_blit_initTTTTTTTT8$$($$$$8$8$00(00(00<<0<(((((((((((((( r600_vb_ib_getr600_blit_create_rectr600_kms_blit_copyradeon_pm_initradeon_set_power_stateradeon_pm_debug_check_in_vblradeon_acpi_eventradeon_pm_print_statesradeon_pm_compute_clocksradeon_dp_i2c_aux_chradeon_process_aux_chradeon_dp_getdpcdxxxxxxxxx`=radeon_dp_get_link_statusradeon_dp_link_train_cr dp_get_adjust_trainradeon_dp_link_train_cer600_audio_enable_pollingr600_audio_disable_pollingr600_hdmi_calc_CTSr600_hdmi_update_audio_settings r600_hdmi_enabler600_hdmi_disable evergreen_page_flipevergreen_pm_miscevergreen_program_watermarksevergreen_cp_startevergreen_irq_setevergreen_irq_processevergreen_resumeevergreen_startupevergreen_gpu_initevergreen_get_tile_pipe_to_backend_mapevergreen_initevergreen_cs_packet_parseevergreen_packet0_checkevergreen_cs_parseevergreen_cs_packet_parse_vlineevergreen_packet3_checkevergreen_cs_track_checkevergreen_cs_track_validate_cbevergreen_surface_value_conv_checkevergreen_surface_check_linear_alignedevergreen_surface_checkevergreen_surface_check_1devergreen_surface_check_2devergreen_cs_track_validate_stencilevergreen_cs_track_validate_htileevergreen_cs_track_validate_depth? P<{ݘ'{=~? <{ݜ {=~evergreen_cs_track_validate_textureevergreen_cs_packet_next_relocevergreen_vm_packet3_checkevergreen_vm_reg_valid @ 8k8k 8k@8k` <@ <ggi;i@iGiii`*i iii i" ?iii????i ii)i*i iiiiiiiiiiii  ievergreen_blit_init```     *UUU**UU***UUU**UU***UUU**UU***UUU**UU***UUU**UU***UUU**UU**"dev=%u, seqno=%u", REC->dev, REC->seqno"bo=%p, pages=%u", REC->bo, REC->pageswxy4z{|} ~!DIHGF$ ff o``jni_init_microcodecayman_cp_startcayman_resumecayman_startupcayman_get_tile_pipe_to_backend_mapcayman_initwxy4z{|} ~!DIHGF$ ff o``jwxy4z{|} ~!DIHGF$ ff o``jwxy4z{|} ~!DIHGF$ ff o``k @8k8k 8k@8k` @<@ggi`*i iii i" ?iii iiii iii)i;i@iGiiiiiiiiiii2Tv????iatombios_dvo_setupatombios_digital_setupatombios_dig_encoder_setupLMLLatombios_dig_transmitter_setupatombios_external_encoder_setupradeon_atom_dac_detectradeon_atom_dig_detectradeon_atom_pick_dig_encoderatombios_set_encoder_crtc_sourceradeon_atom_encoder_dpmsradeon_process_i2c_ch dce6_program_watermarkssi_vm_packet3_ce_checksi_vm_packet3_gfx_checksi_vm_reg_validsi_vm_packet3_compute_checksi_irq_setsi_irq_processsi_resumesi_startupsi_init_microcodeo@pq@rtu4vwyz !|}~D$ ff o``tsi_cp_startsi_get_tile_pipe_to_backend_mapsi_tiling_mode_table_initsi_init o@pq@rtu4vwyz !|}~D$ ff o``to@pq@rtu4vwyz !|}~D$ ff o``ti`*iiii i" ?iiiiiiiiiiiiiiii2Tv????iradeon_atpx_get_versionradeon_atpx_executeradeon_atif_call/lib/firmware/radeonradeon kernel modesetting for R600 or later requires firmware-linux-nonfree. radeondrmfbradeon DRM requires firmware-linux-nonfree. <6>[drm] VGACON disable radeon kernel modesetting. <6>[drm] radeon defaulting to kernel modesetting. <6>[drm] radeon kernel modesetting enabled. radeonATI Radeon20080528wait for fifo failed status : 0x%08X 0x%08X drmwait idle failed status : 0x%08X 0x%08X programming igp gart %08X %08lX %08X programming pcie %08X %08lX %08X failed to cleanup PCI GART! %s called without lock held, held %d owner %p %p called before init done done_age = %d <6>[drm] Num pipes: %d Called with no initialization Starting radeon_do_resume_cp() radeon_do_resume_cp() complete radeon/R100_cp.binradeon/R200_cp.binradeon/R300_cp.binradeon/R420_cp.binradeon/RS690_cp.binradeon/RS600_cp.binradeon/R520_cp.binCannot initialise DRM on this card This card requires a new X.org DDX for 3D Forcing AGP card to PCI mode Restoring AGP flag PCI GART memory not allocated! TIMEOUT problem! BAD cp_mode (%x)! could not find sarea! could not find cp ring region! could not find ring read pointer! could not find dma buffer region! could not find GART texture region! could not find ioremap agp regions! dev_priv->cp_ring->handle %p dev_priv->ring_rptr->handle %p dev->agp_buffer_map->handle %p <6>[drm] Setting GART location based on new memory map <6>[drm] Can't use AGP base @0x%08lx, won't fit <6>[drm] GART aligned down from 0x%08x to 0x%08x <6>[drm] Setting GART location based on old memory map dev_priv->gart_size %d dev_priv->gart_vm_start 0x%x dev_priv->gart_buffers_offset 0x%lx Setting phys_pci_gart to %p %08lX Cannot use PCI Express without GART in FB memory failed to init PCI GART! failed to setup GART surface! radeon_cp<3>radeon_cp: Failed to register firmware <6>[drm] Loading R100 Microcode <6>[drm] Loading R200 Microcode <6>[drm] Loading R300 Microcode <6>[drm] Loading R400 Microcode <6>[drm] Loading RS690/RS740 Microcode <6>[drm] Loading RS600 Microcode <6>[drm] Loading R500 Microcode <3>radeon_cp: Bogus length %zu in firmware "%s" Failed to load firmware! <6>[drm] writeback test succeeded in %d usecs <6>[drm] writeback test failed <6>[drm] writeback forced off Process %d trying to send %d buffers via drmDMA Process %d trying to get %d buffers (of %d max) SAREA setup failed PCIAGPPCIE%s card detected ADVANCE_RING(): mismatch: nr: %x write: %x line: %d while CP running called with bogus CP mode (%d) radeon_do_cp_idle %d color tiling disabled drmcolor tiling enabled Invalid parameter %d box: x1=%d y1=%d x2=%d y2=%d ADVANCE_RING(): mismatch: nr: %x write: %x line: %d buf=%d s=0x%x e=0x%x pid=%d copy_to_user %s called without lock held, held %d owner %p %p offset fixed up to 0x%x dirty=0x%08x Invalid depth buffer offset Invalid texture offset for unit 0 Invalid texture offset for unit 1 Invalid texture offset for unit 2 Not a type 3 packet Packet size larger than size of data provided Invalid 3d packet for r100-class chip Too large payload in 3D_LOAD_VBPNTR (count=%d) Invalid offset (k=%d i=%d) in 3D_LOAD_VBPNTR packet. Malformed 3D_LOAD_VBPNTR packet (k=%d i=%d narrays=%d count+1=%d). Invalid 3d packet for r200-class chip Invalid rndr_gen_indx offset Invalid indx_buffer reg address %08X Invalid indx_buffer offset is %08X Invalid first packet offset Invalid second packet offset Invalid packet type %x hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d bad prim %x count %d buffer prim %d hwprim 0x%x vfmt 0x%x %d..%d %d verts bad prim %x numverts %d flags = 0x%x <3>radeon: illegal depth clear request. Buggy mesa detected - please update. %d,%d-%d,%d flags 0x%x %d,%d-%d,%d pfCurrentPage=%d RADEON_CMD_PACKET Packet size provided larger than data provided Invalid colour buffer offset Invalid R200 texture offset Invalid R100 texture offset Invalid R200 cubic texture offset Invalid R100 cubic texture offset Unknown state packet ID %d radeon_emit_packets failed RADEON_CMD_SCALARS RADEON_CMD_VECTORS RADEON_CMD_DMA_DISCARD buffer index %d (of %d max) bad buffer %p %p %d RADEON_CMD_PACKET3 Packet verification failed radeon_emit_packet3 failed RADEON_CMD_PACKET3_CLIP radeon_emit_packet3_clip failed RADEON_CMD_SCALARS2 RADEON_CMD_WAIT %x radeon_emit_wait failed RADEON_CMD_VECLINEAR bad cmd_type %d at byte %d DONE radeon_emit_veclinear failed pid=%d index=%d discard=%d process %d using buffer owned by %p sending pending buffer %d radeon_emit_state2 failed null texture image! Invalid destination offset invalid texture format %d Invalid final destination offset tex=%dx%d blit=%d tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd EAGAIN EFAULT on pad, %d bytes idx=%d s=%d e=%d d=%d reusing indirect: start=0x%x actual=0x%x pid=%d index=%d start=%d end=%d discard=%d misaligned buffer 0x%x no header 0x%x - 0x%x radeon_emit_state failed pid=%d index=%d count=%d discard=%d RADEON_PP_MISCRADEON_PP_CNTLRADEON_RB3D_COLORPITCHRADEON_RE_LINE_PATTERNRADEON_SE_LINE_WIDTHRADEON_PP_LUM_MATRIXRADEON_PP_ROT_MATRIX_0RADEON_RB3D_STENCILREFMASKRADEON_SE_VPORT_XSCALERADEON_SE_CNTLRADEON_SE_CNTL_STATUSRADEON_RE_MISCRADEON_PP_TXFILTER_0RADEON_PP_BORDER_COLOR_0RADEON_PP_TXFILTER_1RADEON_PP_BORDER_COLOR_1RADEON_PP_TXFILTER_2RADEON_PP_BORDER_COLOR_2RADEON_SE_ZBIAS_FACTORRADEON_SE_TCL_OUTPUT_VTX_FMTRADEON_SE_TCL_MATERIAL_EMMISSIVE_REDR200_PP_TXCBLEND_0R200_PP_TXCBLEND_1R200_PP_TXCBLEND_2R200_PP_TXCBLEND_3R200_PP_TXCBLEND_4R200_PP_TXCBLEND_5R200_PP_TXCBLEND_6R200_PP_TXCBLEND_7R200_SE_TCL_LIGHT_MODEL_CTL_0R200_PP_TFACTOR_0R200_SE_VTX_FMT_0R200_SE_VAP_CNTLR200_SE_TCL_MATRIX_SEL_0R200_SE_TCL_TEX_PROC_CTL_2R200_SE_TCL_UCP_VERT_BLEND_CTLR200_PP_TXFILTER_0R200_PP_TXFILTER_1R200_PP_TXFILTER_2R200_PP_TXFILTER_3R200_PP_TXFILTER_4R200_PP_TXFILTER_5R200_PP_TXOFFSET_0R200_PP_TXOFFSET_1R200_PP_TXOFFSET_2R200_PP_TXOFFSET_3R200_PP_TXOFFSET_4R200_PP_TXOFFSET_5R200_SE_VTE_CNTLR200_SE_TCL_OUTPUT_VTX_COMP_SELR200_PP_TAM_DEBUG3R200_PP_CNTL_XR200_RB3D_DEPTHXY_OFFSETR200_RE_AUX_SCISSOR_CNTLR200_RE_SCISSOR_TL_0R200_RE_SCISSOR_TL_1R200_RE_SCISSOR_TL_2R200_SE_VAP_CNTL_STATUSR200_SE_VTX_STATE_CNTLR200_RE_POINTSIZER200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0R200_PP_CUBIC_FACES_0R200_PP_CUBIC_OFFSET_F1_0R200_PP_CUBIC_FACES_1R200_PP_CUBIC_OFFSET_F1_1R200_PP_CUBIC_FACES_2R200_PP_CUBIC_OFFSET_F1_2R200_PP_CUBIC_FACES_3R200_PP_CUBIC_OFFSET_F1_3R200_PP_CUBIC_FACES_4R200_PP_CUBIC_OFFSET_F1_4R200_PP_CUBIC_FACES_5R200_PP_CUBIC_OFFSET_F1_5RADEON_PP_TEX_SIZE_0RADEON_PP_TEX_SIZE_1RADEON_PP_TEX_SIZE_2R200_RB3D_BLENDCOLORR200_SE_TCL_POINT_SPRITE_CNTLRADEON_PP_CUBIC_FACES_0RADEON_PP_CUBIC_OFFSET_T0_0RADEON_PP_CUBIC_FACES_1RADEON_PP_CUBIC_OFFSET_T1_0RADEON_PP_CUBIC_FACES_2RADEON_PP_CUBIC_OFFSET_T2_0R200_PP_TRI_PERFR200_PP_AFS_0R200_PP_AFS_1R200_ATF_TFACTORR200_PP_TXCTLALL_0R200_PP_TXCTLALL_1R200_PP_TXCTLALL_2R200_PP_TXCTLALL_3R200_PP_TXCTLALL_4R200_PP_TXCTLALL_5R200_VAP_PVS_CNTLcalled with no initialization copy_to_user heap already initialized?tried to enable vblank on non-existent crtc %d called with no initialization Invalid crtc %d %s called without lock held, held %d owner %p %p ADVANCE_RING(): mismatch: nr: %x write: %x line: %d copy_to_user called with invalid crtc 0x%x ADVANCE_RING(): mismatch: nr: %x write: %x line: %d %i cliprects drmcopy cliprect faulted R300_CMD_PACKET0 No such registers in hardware reg=%04x sz=%d Cannot emit more than 64 values at a time (reg=%04x sz=%d) Offset failed range check (reg=%04x sz=%d) Register %04x failed check as flag=%02x R300_CMD_VPU R300_CMD_PACKET3 R300_CMD_PACKET3_CLEAR r300_emit_clear failed R300_CMD_PACKET3_RAW Not a packet3 header (0x%08x) Expected packet3 of length %d but have only %d bytes left Too large payload in 3D_LOAD_VBPNTR (count=%d) Offset failed range check (k=%d i=%d) while processing 3D_LOAD_VBPNTR packet. Malformed 3D_LOAD_VBPNTR packet (k=%d i=%d narrays=%d count+1=%d). Invalid bitblt first offset is %08X Invalid bitblt second offset is %08X packet3 INDX_BUFFER without preceding 3D_DRAW_INDX_2 is illegal. 3D_DRAW_INDX_2: packet size %i, expected %i 3D_DRAW_INDX_2: expect subsequent INDX_BUFFER, but stream is too short. 3D_DRAW_INDX_2: expect subsequent INDX_BUFFER. Invalid indx_buffer reg address %08X Invalid indx_buffer offset is %08X INDX_BUFFER: buffer size %i, expected %i Unknown packet3 header (0x%08x) r300_emit_raw_packet3 failed bad packet3 type %i at byte %d r300_emit_packet3 failed R300_CMD_END3D R300_CMD_CP_DELAY RADEON_CMD_DMA_DISCARD buffer index %d (of %d max) bad buffer %p %p %d R300_CMD_WAIT R300_CMD_SCRATCH r300_scratch failed Calling r500 command on r300 card R300_CMD_R500FP r500fp %d %d type: %d bad cmd_type %i at byte %d END r300_emit_packet0 failed r300_emit_vpu failed r300_emit_r500fp failed <6>[drm] wait for fifo failed status : 0x%08X 0x%08X <6>[drm] wait idle failed status : 0x%08X 0x%08X unable to map PCIGART pages! page entry %d: 0x%016llx drm ADVANCE_RING(): mismatch: nr: %x write: %x line: %d <6>[drm] Resetting GPU RS780RV670RV635RV620RV630RV610R600RV710RV730RV770&dev_priv->cs_mutexCannot initialise DRM on this card This card requires a new X.org DDX for 3D Forcing AGP card to PCI mode Restoring AGP flag TIMEOUT problem! BAD cp_mode (%x)! could not find sarea! could not find cp ring region! could not find ring read pointer! could not find dma buffer region! could not find GART texture region! could not find ioremap agp regions! dev_priv->cp_ring->handle %p dev_priv->ring_rptr->handle %p dev->agp_buffer_map->handle %p <6>[drm] Setting GART location based on new memory map <6>[drm] Can't use AGP base @0x%08lx, won't fit <6>[drm] GART aligned down from 0x%08x to 0x%08x fb 0x%08x size %d dev_priv->gart_size %d dev_priv->gart_vm_start 0x%08x dev_priv->gart_buffers_offset 0x%08lx Need gart offset from userspace Using gart offset 0x%08lx ioremap failed. Setting phys_pci_gart to %p %08lX Failed to init GART table r600_cp<3>r600_cp: Failed to register firmware /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/r600_cp.c<6>[drm] Loading %s CP Microcode radeon/%s_pfp.bin<3>r600_cp: Bogus length %zu in firmware "%s" radeon/%s_me.binFailed to load firmware! <6>[drm] writeback test succeeded in %d usecs <6>[drm] writeback test failed <6>[drm] writeback forced off dwords:%d offset 0x%lx unable to allocate vertex buffer for swap buffer %d,%d-%d,%d Invalid destination offset Invalid final destination offset EAGAIN EFAULT on pad, %d bytes called with no initialization cs ioctl valid only for R6XX & R7XX in legacy mode ib_get failed endis(%d) create WB bo failed (%d) pin WB bo failed (%d) map WB bo failed WB %sabled limiting VRAM to PCI aperture size VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used) limiting GTT GTT: %lluM 0x%016llX - 0x%016llX <6>[drm] GPU not posted. posting now... Card not posted and no BIOS - ignoring Failed to DMA MAP the dummy page Unable to find PCI I/O BAR; using MMIO for ATOM IIO &rdev->mode_info.atom_context->mutexvram limit (%d) must be a power of 2 gart size (%d) too small forcing to 512M gart size (%d) must be a power of 2 invalid AGP mode %d (valid mode: -1, 0, 1, 2, 4, 8) <6>[drm] initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X). &mutex->mutex&rdev->ring[i].mutex&rdev->dc_hw_i2c_mutex&rdev->gem.mutex&rdev->pm.mutex&rdev->vram_mutex<4>radeon: No suitable DMA available. <4>radeon: No coherent DMA available. <6>[drm] register mmio base: 0x%08X <6>[drm] register mmio size: %u Unable to find PCI I/O BAR <6>[drm] radeon: acceleration disabled, skipping move tests <6>[drm] radeon: acceleration disabled, skipping sync tests <6>[drm] radeon: acceleration disabled, skipping benchmarks <6>[drm] radeon: finishing device. <6>radeon: switched on <6>radeon: switched off GPU reset succeed GPU reset failed Reached maximum number of debugfs components. Report so we increase RADEON_DEBUGFS_MAX_COMPONENTS. Invalid callback to write register 0x%04X with 0x%08X /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/radeon_asic.cInvalid callback to read register 0x%04X <6>[drm] Forcing AGP to PCIE mode <6>[drm] Forcing AGP to PCI mode invalid ioctl with kms %s tiling config is r6xx+ only! drmWANT_HYPERZ: invalid value %d WANT_CMASK: invalid value %d Invalid request %d copy_to_user unknown crtc id %d Fatal error during GPU init Fatal error during modeset init Invalid crtc %d withoutwith<6>[drm] Internal thermal controller %s fan control <6>[drm] Special thermal controller config <6>[drm] Possible %s thermal controller at 0x%02x %s fan control Unknown table version %d, %d <6>[drm] Possible %s thermal controller at 0x%02x 0x%xSkipping Component Video drmUnsupported IGP table: %d %d TMDS PLL From ATOMBIOS %u %x Unsupported ASIC_InternalSS_Info table: %d %d Bad LCD record %d Default TV standard: NTSC Default TV standard: NTSC-J Default TV standard: PAL Default TV standard: PAL-M Default TV standard: PAL-N Default TV standard: PAL-CN Default TV standard: PAL-60 Default TV standard: SECAM Unknown TV standard; defaulting to NTSC TV1 connected TV1 disconnected CV connected CV disconnected LCD1 connected LCD1 disconnected CRT1 connected CRT1 disconnected CRT2 connected CRT2 disconnected DFP1 connected DFP1 disconnected DFP2 connected DFP2 disconnected DFP3 connected DFP3 disconnected DFP4 connected DFP4 disconnected DFP5 connected DFP5 disconnected DFP6 connected DFP6 disconnected NONElm63adm1032adm1030max6649lm64f75375asc7xxxRV6xxRV770adt7473External GPIOEvergreenemc2103SumoNorthern IslandsSouthern Islandslm961634, 81, 2, 4Unable to acquire AGP: %d Unable to get AGP info: %d AGP aperture too small (%zuM) need at least 32M, disabling AGP Illegal AGP Mode: %d (valid %s), leaving at %d <6>[drm] AGP mode requested: %d Unable to enable AGP (mode = 0x%lx) GTT: %lluM 0x%08llX - 0x%08llX radeon AGP reinit failed Unknown table version %d %d No FB bound drmUnsupported screen depth %d DVI_DDCVGA_DDCMM_I2CMONIDGPIOPAD_MASKCRT2_DDCDefault TV standard: NTSC drmDefault TV standard: PAL Default TV standard: PAL-M Default TV standard: PAL-60 Default TV standard: NTSC-J Default TV standard: SCART-PAL Unknown TV standard; defaulting to NTSC 29.498928713 MHz TV ref clk 28.636360000 MHz TV ref clk 14.318180000 MHz TV ref clk 27.000000000 MHz TV ref clk <6>[drm] No TV DAC info found in BIOS <6>[drm] Panel ID String: %s <6>[drm] Panel Size %dx%d <6>[drm] No panel info found in BIOS <6>[drm] Panel info derived from registers DFP table revision: %d TMDS PLL From COMBIOS %u %x <6>[drm] No TMDS info found in BIOS External TMDS Table revision: %d <6>[drm] No valid Ext TMDS info found in BIOS <6>[drm] Connector Table: %d (generic) <6>[drm] Connector Table: %d (ibook) <6>[drm] Connector Table: %d (powerbook external tmds) <6>[drm] Connector Table: %d (powerbook internal tmds) <6>[drm] Connector Table: %d (powerbook vga) <6>[drm] Connector Table: %d (mini external tmds) <6>[drm] Connector Table: %d (mini internal tmds) <6>[drm] Connector Table: %d (imac g5 isight) <6>[drm] Connector Table: %d (emac) <6>[drm] Connector Table: %d (rn50-power) <6>[drm] Connector Table: %d (mac x800) <6>[drm] Connector Table: %d (mac g5 9600) <6>[drm] Connector Table: %d (SAM440ep embedded board) <6>[drm] Connector Table: %d (mac g4 silver) <6>[drm] Connector table: %d (invalid) Unknown connector type: %d Found DFP table, assuming DVI connector Found CRT table, assuming VGA connector No connector info found LCDLCD DDC Info Table found! <6>[drm] Possible %s thermal controller at 0x%02x f75375Unknown id %d TV1 connected TV1 disconnected LCD1 connected LCD1 disconnected CRT1 connected CRT1 disconnected CRT2 connected CRT2 disconnected DFP1 connected DFP1 disconnected DFP2 connected DFP2 disconnected NONElm63adm1032<6>unimplemented! <6>Unknown IIO opcode. ATOM BIOS beeped! <7> block: %d base: 0x%04X POST card output: 0x%02X <7>REG[0x%04X]<6>PCI registers are not implemented. <6>SYSIO registers are not implemented. <6>Bad IO mode. <6>Undefined indirect IO read method %d. <7>PS[0x%02X,0x%04X]<7>WS[0x%02X]<7>ID[0x%04X+%04X]<7>ID[0x%04X]ATOM: fb read beyond scratch region: %d vs. %d <7>FB[0x%02X]<7>IMM 0x%08X <7>IMM 0x%04X <7>IMM 0x%02X <7>PLL[0x%02X]<7>MC[0x%02X]<7>.[31:0] -> 0x%08X <7>.[15:0] -> 0x%04X <7>.[23:8] -> 0x%04X <7>.[31:16] -> 0x%04X <7>.[7:0] -> 0x%02X <7>.[15:8] -> 0x%02X <7>.[23:16] -> 0x%02X <7>.[31:24] -> 0x%02X EQNE src1: src2: result: %s switch: case: target: %04X <6>Bad case. GTLE result: %s %s fb_base: <6>Undefined indirect IO write method %d. <7>PS[0x%02X]ATOM: fb write beyond scratch region: %d vs. %d <7>.[31:0] <- 0x%08X <7>.[15:0] <- 0x%04X <7>.[23:8] <- 0x%04X <7>.[31:16] <- 0x%04X <7>.[7:0] <- 0x%02X <7>.[15:8] <- 0x%02X <7>.[23:16] <- 0x%02X <7>.[31:24] <- 0x%02X dst: shift: %d src: count: %d yesno taken: %s target: 0x%04X atombios stuck in loop for more than 5secs aborting mask: 0x%08x port: %d (%s) port: %d >> execute %04X (len %d, WS %d, PS %d) %s @ 0x%04X [%d] @ 0x%04X atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X << table: %d (%s) table: %d <6>Invalid BIOS magic. 761295520<6>Invalid ATI magic. ATOM<6>Invalid ATOM magic. <6>ATOM BIOS: %s atom firmware requested %08x %dkb drmRESERVEDMOVE_REGMOVE_PSMOVE_WSMOVE_FBMOVE_PLLMOVE_MCAND_REGAND_PSAND_WSAND_FBAND_PLLAND_MCOR_REGOR_PSOR_WSOR_FBOR_PLLOR_MCSHIFT_LEFT_REGSHIFT_LEFT_PSSHIFT_LEFT_WSSHIFT_LEFT_FBSHIFT_LEFT_PLLSHIFT_LEFT_MCSHIFT_RIGHT_REGSHIFT_RIGHT_PSSHIFT_RIGHT_WSSHIFT_RIGHT_FBSHIFT_RIGHT_PLLSHIFT_RIGHT_MCMUL_REGMUL_PSMUL_WSMUL_FBMUL_PLLMUL_MCDIV_REGDIV_PSDIV_WSDIV_FBDIV_PLLDIV_MCADD_REGADD_PSADD_WSADD_FBADD_PLLADD_MCSUB_REGSUB_PSSUB_WSSUB_FBSUB_PLLSUB_MCSET_ATI_PORTSET_PCI_PORTSET_SYS_IO_PORTSET_REG_BLOCKSET_FB_BASECOMPARE_REGCOMPARE_PSCOMPARE_WSCOMPARE_FBCOMPARE_PLLCOMPARE_MCSWITCHJUMPJUMP_EQUALJUMP_BELOWJUMP_ABOVEJUMP_BELOW_OR_EQUALJUMP_ABOVE_OR_EQUALJUMP_NOT_EQUALTEST_REGTEST_PSTEST_WSTEST_FBTEST_PLLTEST_MCDELAY_MILLISECDELAY_MICROSECCALL_TABLEREPEATCLEAR_REGCLEAR_PSCLEAR_WSCLEAR_FBCLEAR_PLLCLEAR_MCNOPEOTMASK_REGMASK_PSMASK_WSMASK_FBMASK_PLLMASK_MCPOST_CARDBEEPSAVE_REGRESTORE_REGSET_DATA_BLOCKXOR_REGXOR_PSXOR_WSXOR_FBXOR_PLLXOR_MCSHL_REGSHL_PSSHL_WSSHL_FBSHL_PLLSHL_MCSHR_REGSHR_PSSHR_WSSHR_FBSHR_PLLSHR_MCDEBUGCTB_DSASIC_InitGetDisplaySurfaceSizeASIC_RegistersInitVRAM_BlockVenderDetectionSetClocksRatioMemoryControllerInitGPIO_PinInitMemoryParamAdjustDVOEncoderControlGPIOPinControlSetEngineClockSetMemoryClockSetPixelClockDynamicClockGatingResetMemoryDLLResetMemoryDeviceMemoryPLLInitEnableMemorySelfRefreshAdjustMemoryControllerEnableASIC_StaticPwrMgtASIC_StaticPwrMgtStatusChangeDAC_LoadDetectionTMDS2EncoderControlLCD1OutputControlDAC1EncoderControlDAC2EncoderControlDVOOutputControlCV1OutputControlSetCRTC_DPM_StateTVEncoderControlTMDS1EncoderControlLVDSEncoderControlTV1OutputControlEnableScalerBlankCRTCEnableCRTCGetPixelClockEnableVGA_RenderEnableVGA_AccessSetCRTC_TimingSetCRTC_OverScanSetCRTC_ReplicationSelectCRTC_SourceEnableGraphSurfacesUpdateCRTC_DoubleBufferRegistersLUT_AutoFillEnableHW_IconCursorGetMemoryClockGetEngineClockSetCRTC_UsingDTDTimingTVBootUpStdPinDetectionDFP2OutputControlVRAM_BlockDetectionByStrapMemoryCleanUpReadEDIDFromHWAssistedI2CWriteOneByteToHWAssistedI2CReadHWAssistedI2CStatusSpeedFanControlPowerConnectorDetectionMC_SynchronizationComputeMemoryEnginePLLMemoryRefreshConversionVRAM_GetCurrentInfoBlockDynamicMemorySettingsMemoryTrainingEnableLVDS_SSDFP1OutputControlSetVoltageCRT1OutputControlCRT2OutputControlSetupHWAssistedI2CStatusClockSourceMemoryDeviceInitEnableYUVMMPLLMCPCIEPCIE PORT--- ring %d --- Last signaled fence 0x%08X Last emitted fence %p with 0x%08X Querying an unemitted fence : %p ! /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/radeon_fence.cQuerying an invalid fence : %p ! <4>GPU lockup (waiting for 0x%08X last fence id 0x%08X) fence failed to get scratch register <6>[drm] fence driver on ring %d use gpu addr 0x%08Lx and cpu addr 0x%p fence debugfs file creation failed radeon_fence_infoUnknown placement %d Trying to move memory with ring turned off. nothing to bind %lu pages for mreg %p back %p! /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/radeon_ttm.cfailed to bind %lu pages at 0x%08X AGP is not enabled for memory type %u Unsupported memory type %u Failed setting up TTM memory accounting subsystem. Failed setting up TTM BO subsystem. failed initializing buffer object driver(%d). Failed initializing VRAM heap. <6>[drm] radeon: %uM of VRAM memory ready Failed initializing GTT heap. <6>[drm] radeon: %uM of GTT memory ready. radeon_vram_mmradeon_gtt_mmttm_page_poolttm_dma_page_poolFailed to init debugfs <6>[drm] radeon: ttm finalized <4>%s:%d alloc size %ldM bigger than %ldMb limit object_init failed for (%lu, 0x%08X) /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/radeon_object.c%p pin failed %p unpin not necessary %p validate failed for unpin Userspace still has active objects ! %p %p %lu %lu force free <6>[drm] Detected VRAM RAM=%lluM, BAR=%lluM <6>[drm] RAM width %dbits %cDR stealing surface reg %d from %p drm%p reserve failed /build/linux-5VIh7j/linux-3.2.78/arch/x86/include/asm/dma-mapping.htrying to unbind memory from uninitialized GART ! /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/radeon_gart.ctrying to bind memory to uninitialized GART ! <6>[drm] GART: num cpu pages %u, num gpu pages %u failed to allocate vm bo (%dKB) va above limit (0x%08X > 0x%08X) bo %p va 0x%08X conflict with (bo %p 0x%08X 0x%08X) bo %p not in vm %p &vm->mutexstill active bo inside vm drmdc=%u, fd=%d, rd=%d, pd=%d Wrote2: 0x%08x 0x%08x 0x%08x (0x%08x) Wrote2: rd=%u, fd=%u, pd=%u Wrote: 0x%08x 0x%08x 0x%08x (0x%08x) Wrote: rd=%d, fd=%d, pd=%d No FB bound trying to scanout microtiled buffer <6>[drm] crtc %d is connected to a TV Mode need scaling but only first crtc can do that. drmbios LVDS_GEN_CNTL: 0x%x <6>[drm] radeon legacy LVDS backlight unloaded S-video TV connection detected Composite TV connection detected <6>[drm] not detecting due to %08x Memory allocation failed radeon_blBacklight registration failed <6>[drm] radeon legacy LVDS backlight initialized Determined LVDS native mode details from EDID drmNo LVDS native mode details, disabling RMX Adding native panel mode %s Adding cvt approximation of native panel mode %s 1: conflicting encoders switching off %s in favor of %s 2: conflicting encoders switching off %s %s: probed a monitor but no|invalid EDID %s: detected RS690 floating bus bug, stopping ddc detect Failed to assign router i2c bus! Check dmesg for i2c errors. eDP-auxchDP-auxchDP: Failed to assign dp ddc bus! Check dmesg for i2c errors. DP: Failed to assign ddc bus! Check dmesg for i2c errors. VGA: Failed to assign ddc bus! Check dmesg for i2c errors. DVIA: Failed to assign ddc bus! Check dmesg for i2c errors. DVI: Failed to assign ddc bus! Check dmesg for i2c errors. HDMI: Failed to assign ddc bus! Check dmesg for i2c errors. LVDS: Failed to assign ddc bus! Check dmesg for i2c errors. setting active device to %08x from %08x %08x for encoder %d drmfailed to unpin buffer after flip failed to reserve buffer after flip flip queue: crtc already busy drmflip-ioctl() cur_fbo = %p, cur_bbo = %p failed to reserve new rbo buffer before flip failed to pin new rbo buffer before flip failed to get vblank before flip failed to reserve new rbo in error path failed to unpin new rbo in error path %d %d, pll dividers - fb: %d.%d ref: %d, post %d PLL freq %llu %u %u %lld %d, pll dividers - fb: %d.%d ref: %d, post %d No GEM object associated to handle 0x%08X, can't create framebuffer coherenttmds_pllload detectiontv standardunderscanunderscan hborderunderscan vborder<6>[drm] Radeon Display Connectors <6>[drm] Connector %d: <6>[drm] %s <6>[drm] DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x <6>[drm] DDC Router 0x%x/0x%x <6>[drm] Clock/Data Router 0x%x/0x%x <6>[drm] DDC: no ddc bus - possible BIOS bug - please report to xorg-driver-ati@lists.x.org <6>[drm] Encoders: <6>[drm] CRT1: %s <6>[drm] CRT2: %s <6>[drm] LCD1: %s <6>[drm] DFP1: %s <6>[drm] DFP2: %s <6>[drm] DFP3: %s <6>[drm] DFP4: %s <6>[drm] DFP5: %s <6>[drm] DFP6: %s <6>[drm] TV1: %s <6>[drm] CV: %s Scaling not consistent across encoder. driverbiosntscpalpal-mpal-60ntsc-jscart-palpal-cnsecamoffonautoUnknownVGADVI-IDVI-DDVI-ACompositeS-videoLVDSComponentDINDisplayPortHDMI-AHDMI-BTVeDPHPD1HPD2HPD3HPD4HPD5HPD6NONEINTERNAL_LVDSINTERNAL_TMDS1INTERNAL_TMDS2INTERNAL_DAC1INTERNAL_DAC2INTERNAL_SDVOAINTERNAL_SDVOBSI170BCH7303CH7301INTERNAL_DVO1EXTERNAL_SDVOAEXTERNAL_SDVOBTITFP513INTERNAL_LVTM1VT1623HDMI_SI1930HDMI_INTERNALINTERNAL_KLDSCP_TMDS1INTERNAL_KLDSCP_DVO1INTERNAL_KLDSCP_DAC1INTERNAL_KLDSCP_DAC2SI178MVPU_FPGAINTERNAL_DDIVT1625HDMI_SI1932DP_AN9801DP_DP501INTERNAL_UNIPHYINTERNAL_KLDSCP_LVTMAINTERNAL_UNIPHY1INTERNAL_UNIPHY2NUTMEGTRAVISINTERNAL_VCEbad cursor width or height %d x %d Cannot find cursor object %x for crtc %d x %d y %d c->x %d c->y %d drm/build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/radeon_cursor.ci2c: unhandled radeon chip gpio not supported with hw i2c unsupported asic i2c write error 0x%08x drmi2c read error 0x%08x failed to get i2c bus Radeon i2c hw bus %sFailed to register hw i2c %s Radeon i2c bit bus %sFailed to register bit i2c %s Radeon aux bus %s<6>[drm] Failed to register i2c %s <6>[drm] hw_i2c forced on, you may experience display detection problems! val = 0x%02x i2c 0x%02x 0x%02x read failed i2c 0x%02x 0x%02x write failed <6>[drm] Using generic clock info <3>failed to allocate framebuffer (%d) failed to create fbcon object %d failed to initalise framebuffer %d radeondrmfb<6>[drm] fb mappable at 0x%lX <6>[drm] vram apper at 0x%lX <6>[drm] size %lu <6>[drm] fb depth is %d <6>[drm] pitch is %d ,/build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/radeon_gem.cFailed to allocate GEM object (%d, %d, %u, %d) <4>Set domain withou domain ! <3>Failed to wait for object ! unimplemented %s %d drm offset 0x%lX is in reserved area 0x%X invalid flags 0x%08X vs 0x%08X only supported snooped mapping for now unsupported operation %d IB %04u IB fence %p IB size %05u dwords [%05u]=0x%08X radeon: writting more dword to ring than expected ! failed to create fence for new IB failed to get an ib after 5 retry wptr(0x%04x): 0x%08x rptr(0x%04x): 0x%08x driver's copy of the wptr: 0x%08x driver's copy of the rptr: 0x%08x %u free dwords in ring %u dwords in ring r[%04d]=0x%08x radeon: couldn't schedule IB(%u). radeon: scheduling IB failed (%d). (%d) ring create failed (%d) ring pin failed (%d) ring map failed radeon_ib_%04u<6>[drm] radeon: ib pool ready. Failed to register debugfs file for IB ! Failed to register debugfs file for rings ! radeon_ring_gfxradeon_ring_cp1radeon_ring_cp2radeon: using MSI. <6>[drm] radeon: irq initialized. /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/radeon_irq_kms.cgem object lookup failed 0x%x VM not active on asic! VM required on SI+! unknown ring id: %d cs IB too big: %d Failed to initialize parser ! Failed to parse relocation %d! Failed to get ib ! Invalid command stream ! Failed to synchronize rings ! Failed to schedule IB ! cs IB CONST too big: %d Failed to get const ib ! ATOMCOMATRMUnable to allocate bios failed to evaluate ATRM got %s VFCTACPI VFCT table present but broken (too short #1) ACPI VFCT table present but broken (too short #2) <6>[drm] ACPI VFCT contains a BIOS for %02x:%02x.%d %04x:%04x, size %d <6>[drm] ACPI VFCT table is not for this card ACPI VFCT image truncated Unable to locate a BIOS ROM BIOS signature incorrect %x %x <6>[drm] Not an x86 BIOS ROM, not using. MOTA%sBIOS detected drmUnknown copy method dma<6>[drm] radeon: %s %u bo moves of %u kB from %d to %d in %u ms, throughput: %u Mb/s or %u MB/s blitError while benchmarking BO move. Unknown benchmark pitch %d use_pitch %d width %d width_11 %d height %d height_11 %d num levels %d depth %d bpp %d coordinate type %d width round to power of 2 %d height round to power of 2 %d compress format %d Requested mode for not defined action Requested: e: %d m: %d p: %d drmR100 PCI GART already initialized /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/r100.cradeon: moving bo (%d) asking for %u dw. <6>[drm] ib[%d]=0x%08X Can not parse packet at %d after CS end %d ! Unknown packet type %d at %d ! Packet (%d:%d:%d) end after CS buffer (%d) ! vline wait had illegal wait until segment vline wait had illegal wait until cannot find crtc %d unknown crtc reloc No relocation chunk ! No packet3 for relocation for packet at %d. Relocs at %d after relocations chunk end %d ! Only 16 vertex buffers are allowed %d No reloc for packet3 %d No reloc for ib[%d]=0x%04X Cannot src blit from microtiled surface Invalid color buffer format (%d) ! <3>Forbidden register 0x%04X in cs at %d [drm] Buffer too small for PACKET3 INDX_BUFFER (need %u have %lu) ! GPU lockup CP stall for more than %lumsec [drm] No buffer for color buffer %d ! [drm] Buffer too small for color buffer %d (need %lu have %lu) ! [drm] color buffer %d (%u %u %u %u) [drm] No buffer for z buffer ! [drm] Buffer too small for z buffer (need %lu have %lu) ! [drm] zbuffer (%u %u %u %u) [drm] No buffer for AA resolve buffer %d ! [drm] Buffer too small for AA resolve buffer %d (need %lu have %lu) ! [drm] AA resolve buffer %d (%u %u %u %u) (PW %u) Vertex array %u no buffer bound (PW %u) Vertex array %u need %lu dwords have %lu dwords Max indices %u IMMD draw %u dwors but needs %lu dwords VAP_VF_CNTL.NUM_VERTICES %u, VTX_SIZE %u [drm] Invalid primitive walk %d for VAP_VF_CNTL No texture bound to unit %u Cube texture offset greater than object size %lu %lu Invalid texture coordinate type %u for unit %u Texture of unit %u needs %lu bytes but is %lu PRIM_WALK must be 3 for IMMD draw Packet3 opcode %x not supported Unknown packet type %d ! CONFIG_MEMSIZE 0x%08x MC_FB_LOCATION 0x%08x BUS_CNTL 0x%08x MC_AGP_LOCATION 0x%08x AGP_BASE 0x%08x HOST_PATH_CNTL 0x%08x AIC_CTRL 0x%08x AIC_LO_ADDR 0x%08x AIC_HI_ADDR 0x%08x AIC_TLB_ADDR 0x%08x CP_STAT 0x%08x CP_RB_WPTR 0x%08x CP_RB_RPTR 0x%08x %u free dwords in ring %u dwords in ring r[%04d]=0x%08x <4>radeon: wait for empty RBBM fifo failed ! Bad things might happen. radeon: failed to get scratch reg (%d). <6>[drm] ib test succeeded in %u usecs radeon: ib test failed (scratch(0x%04X)=0x%08X) radeon: cp failed to get scratch reg (%d). radeon: cp failed to lock ring (%d). <6>[drm] ring test succeeded in %d usecs radeon: ring test failed (scratch(0x%04X)=0x%08X) You may not have enough display bandwidth for current mode If you have flickering problem, try to lower resolution, refresh rate, or color depth GRPH_BUFFER_CNTL from to %x GRPH2_BUFFER_CNTL from to %x writing surface %d %d %x %x CP_CSQ_MODE 0x%08x CP_CSQ_STAT 0x%08x CP_CSQ2_STAT 0x%08x Ring rptr %u Ring wptr %u Indirect1 rptr %u Indirect1 wptr %u Indirect2 rptr %u Indirect2 wptr %u Ring fifo: rfifo[%04d]=0x%08X Indirect1 fifo: ib1fifo[%04d]=0x%08X Indirect2 fifo: ib2fifo[%04d]=0x%08X RBBM_STATUS 0x%08x RBBM_CMDFIFO_STAT 0x%08x [0x%03X] 0x%04X=0x%08X <6>[drm] Generation 2 PCI interface, using max accessible memory <6>[drm] Generation 1 PCI interface in multifunction mode <6>[drm] Limiting VRAM to one aperture <4>Failed to wait GUI idle while programming pipes. Bad things might happen. <6>[drm] radeon: cp finalized Wait for CP idle timeout, shutting down CP. radeon/R100_cp.binradeon/R200_cp.binradeon/R300_cp.binradeon/R420_cp.binradeon/RS690_cp.binradeon/RS600_cp.binradeon/R520_cp.binFailed to register debugfs file for CP ! radeon_cp<3>radeon_cp: Failed to register firmware <6>[drm] Loading R100 Microcode <6>[drm] Loading R200 Microcode <6>[drm] Loading R300 Microcode <6>[drm] Loading R400 Microcode <6>[drm] Loading RS690/RS740 Microcode <6>[drm] Loading RS600 Microcode <6>[drm] Loading R500 Microcode <3>radeon_cp: Bogus length %zu in firmware "%s" Failed to load firmware! <6>[drm] radeon: ring at 0x%016lX radeon: cp isn't working (%d). HPD1 HPD2 Can't enable IRQ/MSI because no handler is installed <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). Wait for MC idle timeout. failed initializing CP fences (%d). failed initializing CP (%d). failed testing IB (%d). Failed to create r100_mc debugfs file. Expecting combios for RS400/RS480 GPU GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) IB initialization failed (%d). Disabling GPU acceleration (%s:%d) RBBM_STATUS=0x%08X failed to reset GPU GPU reset succeed Setting: p: %d Update pending now high. Unlocking vupdate_lock. r100_rbbm_infor100_cp_ring_infor100_cp_csq_fifor100_mc_infoNo reloc for ib[%d]=0x%04X Invalid RB3D_CCTL: Cannot enable CMASK. Invalid color buffer format (%d)! Invalid color buffer format (%d) ! Invalid z buffer format (%d) ! Invalid texture format %u Forbidden bit TXFORMAT_MSB <3>Forbidden register 0x%04X in cs at %d (val=%08x) PCIE_TX_GART_CNTL 0x%08x PCIE_TX_GART_BASE 0x%08x PCIE_TX_GART_START_LO 0x%08x PCIE_TX_GART_START_HI 0x%08x PCIE_TX_GART_END_LO 0x%08x PCIE_TX_GART_END_HI 0x%08x PCIE_TX_GART_ERROR 0x%08x RV370 PCIE GART already initialized /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/r300.cFailed to register debugfs file for PCIE gart ! No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). <4>Failed to wait GUI idle while programming pipes. Bad things might happen. <4>Failed to wait MC idle while programming pipes. Bad things might happen. <6>[drm] radeon: %d quad pipes, %d Z pipes initialized. (%s:%d) RBBM_STATUS=0x%08X failed to reset GPU GPU reset succeed No reloc for packet3 %d PRIM_WALK must be 3 for IMMD draw Packet3 opcode %x not supported Unknown packet type %d ! Failed to create r100_mc debugfs file. <6>[drm] Failed to wait MC idle before programming MC. failed initializing CP fences (%d). failed initializing CP (%d). failed testing IB (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Expecting combios for RS400/RS480 GPU IB initialization failed (%d). Disabling GPU acceleration rv370_pcie_gart_infoGB_PIPE_SELECT 0x%08x GB_TILE_CONFIG 0x%08x DST_PIPE_CONFIG 0x%08x <4>Failed to wait GUI idle while programming pipes. Bad things might happen. <6>[drm] radeon: %d quad pipes, %d z pipes initialized. failed initializing CP fences (%d). failed initializing CP (%d). failed testing IB (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Failed to register debugfs file for RBBM ! Failed to register debugfs file for pipes ! IB initialization failed (%d). Disabling GPU acceleration r420_pipes_infoHOST_PATH_CNTL 0x%08x BUS_CNTL 0x%08x AIC_CTRL_SCRATCH 0x%08x MCCFG_AGP_BASE 0x%08x MCCFG_AGP_BASE_2 0x%08x MCCFG_AGP_LOCATION 0x%08x MCCFG_FB_LOCATION 0x%08x HDP_FB_LOCATION 0x%08x AGP_BASE 0x%08x AGP_BASE_2 0x%08x MC_AGP_LOCATION 0x%08x GART_BASE 0x%08x GART_FEATURE_ID 0x%08x AGP_MODE_CONTROL 0x%08x MC_MISC_CNTL 0x%08x MC_MISC_UMA_CNTL 0x%08x AGP_ADDRESS_SPACE_SIZE 0x%08x GART_CACHE_CNTRL 0x%08x MC_GART_ERROR_ADDRESS 0x%08x MC_GART_ERROR_ADDRESS_HI 0x%08x GART_ERROR_0 0x%08x GART_ERROR_1 0x%08x GART_ERROR_2 0x%08x GART_ERROR_3 0x%08x GART_ERROR_4 0x%08x GART_ERROR_5 0x%08x GART_ERROR_6 0x%08x GART_ERROR_7 0x%08x Unable to use IGP GART size %uM Valid GART size for IGP are 32M,64M,128M,256M,512M,1G,2G Forcing to 32M GART size RS400 GART already initialized /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/rs400.cFailed to register debugfs file for RS400 GART ! <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). <4>rs400: Failed to wait MC idle while programming pipes. Bad things might happen. %08x rs400: Wait MC idle timeout before updating MC. failed initializing CP fences (%d). failed initializing CP (%d). failed testing IB (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Expecting combios for RS400/RS480 GPU IB initialization failed (%d). Disabling GPU acceleration rs400_gart_infoUpdate pending now high. Unlocking vupdate_lock. drmSetting: p: %d (%s:%d) RBBM_STATUS=0x%08X failed to reset GPU GPU reset succeed RS600 GART already initialized /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/rs600.cCan't enable IRQ/MSI because no handler is installed HPD1 HPD2 Wait MC idle timeout before updating MC. No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). failed initializing CP fences (%d). failed initializing CP (%d). failed initializing audio failed testing IB (%d). Failed to register debugfs file for RBBM ! GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Expecting atombios for RS600 GPU IB initialization failed (%d). Disabling GPU acceleration No integrated system info for your GPU, using safe default Wait MC idle timeout before updating MC. <4>Failed to wait MC idle while programming pipes. Bad things might happen. failed initializing CP fences (%d). failed initializing CP (%d). failed initializing audio failed testing IB (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Expecting atombios for RV515 GPU IB initialization failed (%d). Disabling GPU acceleration VAP_CNTL_STATUS 0x%08x GA_IDLE 0x%08x GB_PIPE_SELECT 0x%08x SU_REG_DEST 0x%08x GB_TILE_CONFIG 0x%08x DST_PIPE_CONFIG 0x%08x <4>Failed to wait GUI idle while resetting GPU. Bad things might happen. <4>Failed to wait MC idle while programming pipes. Bad things might happen. Failed to register debugfs file for RBBM ! Failed to register debugfs file for pipes ! Wait MC idle timeout before updating MC. failed initializing CP fences (%d). failed initializing CP (%d). failed testing IB (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Expecting atombios for RV515 GPU IB initialization failed (%d). Disabling GPU acceleration rv515_pipes_inforv515_ga_infoWait MC idle timeout before updating MC. <4>Failed to wait MC idle while programming pipes. Bad things might happen. failed initializing CP fences (%d). failed initializing CP (%d). failed testing IB (%d). GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X) Expecting atombios for RV515 GPU <6>[drm] GPU not posted. posting now... IB initialization failed (%d). Disabling GPU acceleration R_000E50_SRBM_STATUS : 0x%08X VM_L2_STATUS : 0x%08X IH ring buffer overflow (0x%08X, %d, %d) Requested mode for not defined action Requested: e: %d m: %d p: %d drmSetting: v: %d <4>[drm] r600 flush TLB failed R600 PCIE GART already initialized /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/r600.cNo VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). limiting VRAM VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used) GPU softreset R_008010_GRBM_STATUS=0x%08X R_008014_GRBM_STATUS2=0x%08X R_000E50_SRBM_STATUS=0x%08X Wait for MC idle timedout ! R_008020_GRBM_SOFT_RESET=0x%08X R_008020_GRBM_SOFT_RESET=0x%08X R700RV730R600RS780RV710RV770RV670RV635RV620RV630RV610SUMOSUMO2PALMCYPRESSJUNIPERREDWOODCEDAR radeon_cp<3>radeon_cp: Failed to register firmware <6>[drm] Loading %s Microcode radeon/%s_pfp.bin<3>r600_cp: Bogus length %zu in firmware "%s" radeon/%s_me.binradeon/%s_rlc.bin<3>r600_rlc: Bogus length %zu in firmware "%s" radeon: cp failed to lock ring (%d). radeon: cp failed to get scratch reg (%d). radeon: cp failed to lock ring %d (%d). <6>[drm] ring test on %d succeeded in %d usecs radeon: ring %d test failed (scratch(0x%04X)=0x%08X) radeon: failed to get scratch reg (%d). radeon: failed to get ib (%d). radeon: failed to schedule ib (%d). radeon: fence wait failed (%d). <6>[drm] ib test on ring %d succeeded in %u usecs radeon: ib test failed (scratch(0x%04X)=0x%08X) radeon: failed to create ih ring buffer (%d). radeon: failed to pin ih ring buffer (%d). radeon: failed to map ih ring buffer (%d). Can't enable IRQ/MSI because no handler is installed r600_irq_set: sw int r600_irq_set: vblank 0 r600_irq_set: vblank 1 r600_irq_set: hpd 1 r600_irq_set: hpd 2 r600_irq_set: hpd 3 r600_irq_set: hpd 4 r600_irq_set: hpd 5 r600_irq_set: hpd 6 r600_irq_set: hdmi 1 r600_irq_set: hdmi 2 gui idle Failed to load firmware! failed blitter (%d) falling back to memcpy failed initializing CP fences (%d). radeon: IH init failed (%d). radeon: failed testing IB (%d). r600 startup failed on resume radeon: audio resume failed r600_irq_process start: rptr %d, wptr %d IH: D1 vblank IH: D1 vline Unhandled interrupt: %d %d IH: D2 vblank IH: D2 vline IH: HPD1 IH: HPD2 IH: HPD3 IH: HPD4 IH: HPD5 IH: HPD6 IH: HDMI: 0x%x IH: CP int: 0x%08x IH: CP EOP IH: GUI idle Failed to register debugfs file for mc ! Expecting atombios for R600 GPU Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... IB initialization failed (%d). disabling GPU acceleration r600_mc_infoUpdate pending now high. Unlocking vupdate_lock. drmSetting: v: %d No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). Wait for MC idle timedout ! Failed to load firmware! failed blitter (%d) falling back to memcpy failed initializing CP fences (%d). radeon: IH init failed (%d). IB test failed (%d). limiting VRAM VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used) r600 startup failed on resume radeon: audio init failed Expecting atombios for R600 GPU Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... IB initialization failed (%d). disabling GPU acceleration Failed to allocate %d pointers Failed to create VRAM object Failed to pin VRAM object Failed to create GTT object %d Failed to pin GTT object %d Failed to map GTT object %d Failed to create GTT->VRAM fence %d Failed GTT->VRAM copy %d Failed to wait for GTT->VRAM fence %d Failed to map VRAM object after copy %d Incorrect GTT->VRAM copy %d: Got 0x%p, expected 0x%p (GTT/VRAM offset 0x%16llx/0x%16llx) Failed to create VRAM->GTT fence %d Failed VRAM->GTT copy %d Failed to wait for VRAM->GTT fence %d Failed to map GTT object after copy %d Incorrect VRAM->GTT copy %d: Got 0x%p, expected 0x%p (VRAM/GTT offset 0x%16llx/0x%16llx) <6>[drm] Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx <4>Error while testing BO move. Failed to create sync fence 1 Failed to create sync fence 2 Failed to create semaphore Failed to lock ring A %d Fence 1 signaled without waiting for semaphore. Failed to lock ring B %p Failed to wait for sync fence 1 Fence 2 signaled without waiting for semaphore. <4>Error while testing ring sync (%d). Failed to lock ring B %d Fence A signaled without waiting for semaphore. Neither fence A nor B has been signaled Both fence A and B has been signaled <6>[drm] Fence %c was first signaled Failed to wait for sync fence A Failed to wait for sync fence B <6>[drm] Testing syncing between rings %d and %d... <6>[drm] Testing syncing between rings %d, %d and %d... radeon: moving bo (%d). No reloc for ib[%d]=0x%04X Invalid color buffer format (%d) ! No support for depth xy offset in kms <3>Forbidden register 0x%04X in cs at %d compute_restarts: def = %u h = %d v = %d, p1 = %04x, p2 = %04x, restart = %d drmcompute_restart: F/H/V=%u,%u,%u compute_restart: h_size = %d h_inc = %d forbidden register 0x%08x at %d streamout %d bo too small: 0x%llx, 0x%lx No buffer for streamout %d %s:%d mask 0x%08X | 0x%08X no cb for %d FMASK or CMASK buffer are not supported by this kernel %s:%d cb invalid format %d for %d (0x%08X) %s invalid tiling %d for %d (0x%08X) %s:%d cb pitch (%d, 0x%x, %d) invalid %s:%d cb height (%d, 0x%x, %d) invalid %s offset[%d] 0x%llx 0x%llx, %d not aligned %s offset[%d] %d %d %d %lu too big (%d %d) (%d %d %d) z/stencil with no depth buffer z/stencil with invalid format %d z/stencil buffer size not set z/stencil buffer too small (0x%08X %d %d %ld) %s invalid tiling %d (0x%08X) %s:%d db pitch (%d, 0x%x, %d) invalid %s:%d db height (%d, 0x%x, %d) invalid %s offset 0x%llx, 0x%llx, %d not aligned z/stencil buffer (%d) too small (0x%08X %d %d %d -> %u have %lu) %s:%d htile enabled without htile surface 0x%08x %s:%d htile can't be enabled with bogus db_depth_size 0x%08x %s:%d invalid num pipes %d %s:%d htile surface too small %ld for %ld (%d %d) Can not parse packet at %d after CS end %d ! Unknown packet type %d at %d ! Packet (%d:%d:%d) end after CS buffer (%d) ! No relocation chunk ! No packet3 for relocation for packet at %d. Relocs at %d after relocations chunk end %d ! bad SET_CONTEXT_REG 0x%04X missing reloc for CP_COHER_BASE 0x%04X Broken old userspace ? no cb_color0_base supplied before trying to write 0x%08X bad SET_CONFIG_REG 0x%04X vline wait missing WAIT_REG_MEM segment vline WAIT_REG_MEM waiting on MEM rather than REG vline WAIT_REG_MEM function not equal vline WAIT_REG_MEM bad reg vline WAIT_REG_MEM bad bit mask cannot find crtc %d unknown crtc reloc No reloc for ib[%d]=0x%04X <3>Forbidden register 0x%04X in cs at %d bad SET PREDICATION bad SET PREDICATION operation %d bad START_3D bad CONTEXT_CONTROL bad INDEX_TYPE/NUM_INSTANCES bad DRAW_INDEX %s:%d invalid cmd stream bad DRAW_INDEX_AUTO %s:%d invalid cmd stream %d bad DRAW_INDEX_IMMD bad WAIT_REG_MEM bad SURFACE_SYNC bad EVENT_WRITE bad EVENT_WRITE_EOP bad PACKET3_SET_CONFIG_REG bad PACKET3_SET_CONTEXT_REG bad SET_RESOURCE this kernel doesn't support %d texture dim %s:%d texture invalid format %d %s:%d tex array mode (%d) invalid %s:%d tex pitch (%d, 0x%x, %d) invalid %s:%d tex base offset (0x%llx, 0x%llx, %d) invalid %s:%d tex mip offset (0x%llx, 0x%llx, %d) invalid texture blevel %d > llevel %d texture bo too small ((%d %d) (%d %d) %d %d %d -> %d have %ld) alignments %d %d %d %lld vbo resource seems too big (%d) for the bo (%ld) bad SET_ALU_CONST bad SET_BOOL_CONST bad SET_LOOP_CONST bad SET_CTL_CONST bad SET_SAMPLER bad SURFACE_BASE_UPDATE bad STRMOUT_BUFFER_UPDATE (invalid count) bad STRMOUT_BUFFER_UPDATE (missing dst reloc) bad STRMOUT_BUFFER_UPDATE dst bo too small: 0x%llx, 0x%lx bad STRMOUT_BUFFER_UPDATE (missing src reloc) bad STRMOUT_BUFFER_UPDATE src bo too small: 0x%llx, 0x%lx bad COPY_DW (invalid count) bad COPY_DW (missing src reloc) bad COPY_DW src bo too small: 0x%llx, 0x%lx bad COPY_DW (missing dst reloc) bad COPY_DW dst bo too small: 0x%llx, 0x%lx Packet3 opcode %x not supported Unknown packet type %d ! Failed to initialize parser ! Invalid command stream ! Failed to parse relocation ! drmADVANCE_RING(): mismatch: nr: %x write: %x line: %d Unable to allocate vertex buffer for blit /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/r600_blit_kms.cblit_rectangle: h=%d, w=%d, pages=%d drm&rdev->r600_blit.mutexr600 failed to allocate shader r6xx blit allocated bo %08x vs %08x ps %08x failed to map blit object %d (%d) pin blit object failed failed to get IB for vertex buffer emitting copy %16llx %16llx %d %d rectangle w=%d h=%d dynpmprofile%s lowautomiddefaulthighradeon %d default engine clock: %u0 kHz current engine clock: %u0 kHz default memory clock: %u0 kHz current memory clock: %u0 kHz voltage: %u mV PCIE lanes: %d exitentrynot in vbl for pm change %08x at %s drmSetting: e: %d Setting: m: %d pm: GUI not idle!!! ac_adapterpm: AC pm: DC No display only%d Power State(s) State %d: %s Default %d PCIE Lanes Single display only %d Clock Mode(s) %d e: %d%s %d e: %d m: %d v: %d%s Unable to register hwmon device: %d Unable to create hwmon sysfs file: %d failed to create device file for power profile failed to create device file for power method Failed to register debugfs file for PM! <6>[drm] radeon: power management initialized radeon: dynamic power management deactivated radeon: dynamic power management activated power_profilepower_methodradeon_pm_infoDefaultPowersaveBatteryBalancedPerformancetemp1_inputnamerequested signal parameters: lane %d voltage %s pre_emph %s drmusing signal parameters: voltage %s pre_emph %s dp_aux_ch timeout dp_aux_ch flags not zero dp_aux_ch error link status %02x %02x %02x %02x %02x %02x aux_ch failed %d aux_ch native nack aux_ch native defer aux_ch invalid native reply 0x%02x aux_i2c nack aux_i2c defer aux_i2c invalid reply 0x%02x aux i2c too many retries, giving up DPCD: %02x displayport link status failed clock recovery reached max voltage clock recovery tried 5 times clock recovery failed channel eq failed: 5 tries channel eq failed clock recovery at voltage %d pre-emphasis %d channel eq at voltage %d pre-emphasis %d 0dB3.5dB6dB9.5dB0.4V0.6V0.8V1.2VEnablingDisabling<6>[drm] %s audio support Unknown bits per sample 0x%x using 16 instead r600_audio_enable_polling: %d drmr600_audio_disable_polling: %d Unsupported encoder type 0x%02X Unsupported DIG on encoder 0x%02X Using ACR timing N=%d CTS=%d for frequency %d drmplayingstopped%s with %d channels, %d Hz sampling rate, %d bits per sample, 0x%02X IEC60958 status bits and 0x%02X category code Enabling HDMI on non-dig encoder Enabling HDMI on unknown dig Could not find HDMI block for 0x%x encoder Unknown HDMI output type Enabling HDMI interface @ 0x%04X for encoder 0x%x Disabling not enabled HDMI Disabling HDMI interface @ 0x%04X for encoder 0x%x IH ring buffer overflow (0x%08X, %d, %d) odd number of pipes! Update pending now high. Unlocking vupdate_lock. drmSetting: vddc: %d Setting: vddci: %d force priority to high <4>[drm] r600 flush TLB failed No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). Wait for MC idle timedout ! radeon: cp failed to lock ring (%d). GPU softreset GRBM_STATUS=0x%08X GRBM_STATUS_SE0=0x%08X GRBM_STATUS_SE1=0x%08X SRBM_STATUS=0x%08X GRBM_SOFT_RESET=0x%08X Can't enable IRQ/MSI because no handler is installed /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/evergreen.cevergreen_irq_set: sw int gfx evergreen_irq_set: sw int cp1 evergreen_irq_set: sw int cp2 evergreen_irq_set: vblank 0 evergreen_irq_set: vblank 1 evergreen_irq_set: vblank 2 evergreen_irq_set: vblank 3 evergreen_irq_set: vblank 4 evergreen_irq_set: vblank 5 evergreen_irq_set: hpd 1 evergreen_irq_set: hpd 2 evergreen_irq_set: hpd 3 evergreen_irq_set: hpd 4 evergreen_irq_set: hpd 5 evergreen_irq_set: hpd 6 gui idle r600_irq_process start: rptr %d, wptr %d IH: D1 vblank IH: D1 vline Unhandled interrupt: %d %d IH: D2 vblank IH: D2 vline IH: D3 vblank IH: D3 vline IH: D4 vblank IH: D4 vline IH: D5 vblank IH: D5 vline IH: D6 vblank IH: D6 vline IH: HPD1 IH: HPD2 IH: HPD3 IH: HPD4 IH: HPD5 IH: HPD6 IH: CP int: 0x%08x IH: CP EOP IH: GUI idle Failed to load firmware! Failed to load MC firmware! bad backend map, using default failed blitter (%d) falling back to memcpy failed initializing CP fences (%d). radeon: IH init failed (%d). radeon: failed testing IB (%d). radeon: audio init failed Expecting atombios for evergreen GPU GPU reset failed ! Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... IB initialization failed (%d). disabling GPU acceleration radeon: MC ucode required for NI+. evergreen startup failed on resume %s:%d htile enabled without htile surface 0x%08x %s:%d invalid num pipes %d %s:%d htile surface too small %ld for %ld (%d %d) %s:%d %s pitch %d invalid must be aligned with %d %s:%d %s pitch %d invalid must be aligned with %d (%d %d %d) %s:%d %s height %d invalid must be aligned with 8 %s:%d %s height %d invalid must be aligned with %d %s:%d %s invalid array mode %d Invalid register 0x%x in CS %s:%d %s invalid number of banks %d %s:%d %s invalid bankw %d %s:%d %s invalid bankh %d %s:%d %s invalid macro tile aspect %d %s:%d %s invalid tile split %d streamout %d bo too small: 0x%llx, 0x%lx No buffer for streamout %d %s:%d mask 0x%08X | 0x%08X no cb for %d %s:%d cb invalid format %d for %d (0x%08x) cb%s:%d cb[%d] invalid (0x%08x 0x%08x 0x%08x 0x%08x) %s:%d cb[%d] bo base %ld not aligned with %ld %s:%d cb[%d] bo too small (layer size %d, offset %d, max layer %d, bo size %ld, slice %d) %s:%d problematic surf: (%d %d) (%d %d %d %d %d %d %d) %s:%d stencil invalid format %d stencil%s:%d stencil invalid (0x%08x 0x%08x 0x%08x 0x%08x) %s:%d stencil read bo base %ld not aligned with %ld %s:%d stencil read bo too small (layer size %d, offset %ld, max layer %d, bo size %ld) %s:%d stencil write bo base %ld not aligned with %ld %s:%d stencil write bo too small (layer size %d, offset %ld, max layer %d, bo size %ld) %s:%d depth invalid format %d depth%s:%d depth invalid (0x%08x 0x%08x 0x%08x) %s:%d depth read bo too small (layer size %d, offset %ld, max layer %d, bo size %ld) %s:%d depth write bo too small (layer size %d, offset %ld, max layer %d, bo size %ld) forbidden register 0x%08x at %d Can not parse packet at %d after CS end %d ! Unknown packet type %d at %d ! Packet (%d:%d:%d) end after CS buffer (%d) ! No relocation chunk ! No packet3 for relocation for packet at %d. Relocs at %d after relocations chunk end %d ! bad SET_CONTEXT_REG 0x%04X missing reloc for CP_COHER_BASE 0x%04X bad SET_CONFIG_REG 0x%04X bad SET PREDICATION bad SET PREDICATION operation %d bad CONTEXT_CONTROL bad INDEX_TYPE/NUM_INSTANCES/CLEAR_STATE bad PACKET3_DEALLOC_STATE bad INDEX_BASE %s:%d invalid cmd stream bad DRAW_INDEX bad DRAW_INDEX_2 bad DRAW_INDEX_AUTO %s:%d invalid cmd stream %d bad DRAW_INDEX_MULTI_AUTO bad DRAW_INDEX_IMMD bad DRAW_INDEX_OFFSET bad DRAW_INDEX_OFFSET_2 bad DISPATCH_DIRECT bad DISPATCH_INDIRECT bad WAIT_REG_MEM bad SURFACE_SYNC bad EVENT_WRITE bad EVENT_WRITE_EOP bad EVENT_WRITE_EOS bad PACKET3_SET_CONFIG_REG bad PACKET3_SET_CONTEXT_REG bad SET_RESOURCE bad SET_RESOURCE (tex) %s:%d texture invalid format %d %s:%d texture invalid dimension %d texture%s:%d texture invalid 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x %s:%d texture bo base %ld not aligned with %ld %s:%d mipmap bo base %ld not aligned with %ld %s:%d texture bo too small (layer size %d, offset %ld, max layer %d, depth %d, bo size %ld) (%d %d) %s:%d invalid array mode %d mipmap%s:%d mipmap [%d] bo too small (layer size %d, offset %ld, coffset %ld, max layer %d, depth %d, bo size %ld) level0 (%d %d %d) bad SET_RESOURCE (vtx) vbo resource seems too big for the bo bad SET_BOOL_CONST bad SET_LOOP_CONST bad SET_CTL_CONST bad SET_SAMPLER bad STRMOUT_BUFFER_UPDATE (invalid count) bad STRMOUT_BUFFER_UPDATE (missing dst reloc) bad STRMOUT_BUFFER_UPDATE dst bo too small: 0x%llx, 0x%lx bad STRMOUT_BUFFER_UPDATE (missing src reloc) bad STRMOUT_BUFFER_UPDATE src bo too small: 0x%llx, 0x%lx bad COPY_DW (invalid count) bad COPY_DW (missing src reloc) bad COPY_DW src bo too small: 0x%llx, 0x%lx bad COPY_DW (missing dst reloc) bad COPY_DW dst bo too small: 0x%llx, 0x%lx Packet3 opcode %x not supported vline wait missing WAIT_REG_MEM segment vline WAIT_REG_MEM waiting on MEM rather than REG vline WAIT_REG_MEM function not equal vline WAIT_REG_MEM bad reg vline WAIT_REG_MEM bad bit mask cannot find crtc %d unknown crtc reloc No reloc for ib[%d]=0x%04X <3>Forbidden register 0x%04X in cs at %d Unknown packet type %d ! Packet0 not allowed! &rdev->r600_blit.mutexevergreen failed to allocate shader evergreen blit allocated bo %08x vs %08x ps %08x drmfailed to map blit object %d (%d) pin blit object failed /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/./radeon_trace.h%s: dev=%u, seqno=%u bo=%p, pages=%u devu32seqnobostruct radeon_bo *pagesradeon_fence_wait_endradeon_fence_wait_beginradeon_fence_retireradeon_fence_emitradeonradeon_bo_createodd number of pipes! BTCBARTSTURKSCAICOSCAYMANARUBA drmradeon_cp<3>radeon_cp: Failed to register firmware /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/ni.c<6>[drm] Loading %s Microcode radeon/%s_pfp.bin<3>ni_cp: Bogus length %zu in firmware "%s" radeon/%s_me.binradeon/%s_rlc.bin<3>ni_rlc: Bogus length %zu in firmware "%s" radeon/%s_mc.bin<3>ni_mc: Bogus length %zu in firmware "%s" No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). radeon: cp failed to lock ring (%d). Failed to load firmware! Failed to load MC firmware! failed blitter (%d) falling back to memcpy Failed to init rlc BOs! failed initializing CP fences (%d). radeon: IH init failed (%d). radeon: failed testing IB (%d). GPU softreset GRBM_STATUS=0x%08X GRBM_STATUS_SE0=0x%08X GRBM_STATUS_SE1=0x%08X SRBM_STATUS=0x%08X VM_CONTEXT0_PROTECTION_FAULT_ADDR 0x%08X VM_CONTEXT0_PROTECTION_FAULT_STATUS 0x%08X VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X Wait for MC idle timedout ! GRBM_SOFT_RESET=0x%08X cayman startup failed on resume Expecting atombios for cayman GPU Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... IB initialization failed (%d). vm manager initialization failed (%d). disabling GPU acceleration radeon: MC ucode required for NI+. detect returned false drmBios 0 scratch %x %08x Unknown table version %d, %d Unknown table version: %d, %d LVDS required digital encoder 2 but it was in use - stealing encoder dpms %d to mode %d, devices %08x, active_devices %08x failed to get a bo after 5 retry still in use semaphore (%d) failed to allocate bo for manager sa_manager is not empty, clearing anyway no bo for sa manager (%d) failed to reserve manager bo (%d) failed to pin manager bo /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/radeon_sa.chw i2c: tried to write too many bytes (%d vs 2) hw_i2c error drmIH ring buffer overflow (0x%08X, %d, %d) odd number of pipes! force priority to high drmInvalid register 0x%x in CS GPU softreset GRBM_STATUS=0x%08X GRBM_STATUS2=0x%08X GRBM_STATUS_SE0=0x%08X GRBM_STATUS_SE1=0x%08X SRBM_STATUS=0x%08X Wait for MC idle timedout ! GRBM_SOFT_RESET=0x%08X No VRAM object for PCIE GART. <6>[drm] PCIE GART of %uM enabled (table at 0x%016llX). Packet0 not allowed! Invalid CE packet3: 0x%x bad PACKET3_SET_CONFIG_REG Invalid GFX packet3: 0x%x Invalid Compute packet3: 0x%x Non-PM4 ring %d ! Unknown packet type %d ! (%d) reserve RLC sr bo failed (%d) reserve RLC c bo failed (%d) create RLC sr bo failed (%d) pin RLC sr bo failed (%d) create RLC c bo failed (%d) pin RLC c bo failed Can't enable IRQ/MSI because no handler is installed /build/linux-5VIh7j/linux-3.2.78/drivers/gpu/drm/radeon/si.csi_irq_set: sw int gfx si_irq_set: sw int cp1 si_irq_set: sw int cp2 si_irq_set: vblank 0 si_irq_set: vblank 1 si_irq_set: vblank 2 si_irq_set: vblank 3 si_irq_set: vblank 4 si_irq_set: vblank 5 si_irq_set: hpd 1 si_irq_set: hpd 2 si_irq_set: hpd 3 si_irq_set: hpd 4 si_irq_set: hpd 5 si_irq_set: hpd 6 gui idle TAHITIPITCAIRNVERDE radeon_cp<3>radeon_cp: Failed to register firmware <6>[drm] Loading %s Microcode radeon/%s_pfp.bin<3>si_cp: Bogus length %zu in firmware "%s" radeon/%s_me.binradeon/%s_ce.binradeon/%s_rlc.bin<3>si_rlc: Bogus length %zu in firmware "%s" radeon/%s_mc.bin<3>si_mc: Bogus length %zu in firmware "%s" <3>si_cp: Failed to load firmware "%s" Failed to load firmware! Failed to load MC firmware! unknown asic: 0x%x Failed to init rlc BOs! failed initializing CP fences (%d). radeon: IH init failed (%d). radeon: cp failed to lock ring (%d). radeon: failed testing IB (%d) on CP ring 0 radeon: failed testing IB (%d) on CP ring 1 radeon: failed testing IB (%d) on CP ring 2 si_irq_process start: rptr %d, wptr %d IH: D1 vblank IH: D1 vline Unhandled interrupt: %d %d IH: D2 vblank IH: D2 vline IH: D3 vblank IH: D3 vline IH: D4 vblank IH: D4 vline IH: D5 vblank IH: D5 vline IH: D6 vblank IH: D6 vline IH: HPD1 IH: HPD2 IH: HPD3 IH: HPD4 IH: HPD5 IH: HPD6 IH: CP EOP IH: GUI idle si startup failed on resume Expecting atombios for cayman GPU Card not posted and no BIOS - ignoring <6>[drm] GPU not posted. posting now... <6>[drm] Probable bad vram size: 0x%08x limiting VRAM limiting VRAM to PCI aperture size VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used) limiting GTT GTT: %lluM 0x%016llX - 0x%016llX IB initialization failed (%d). vm manager initialization failed (%d). disabling GPU acceleration radeon: MC ucode required for NI+. %s: failed to call ATPX: %s <6>radeon atpx: version is %d ATPX<6>VGA switcheroo: detected switching method %s handle ATIFfailed to evaluate ATIF got %s drmlicense=GPL and additional rightsdescription=ATI Radeonauthor=Gareth Hughes, Keith Whitwell, others.parmtype=msi:intparm=msi:MSI support (1 = enable, 0 = disable, -1 = auto)parmtype=pcie_gen2:intparm=pcie_gen2:PCIE Gen2 mode (1 = enable)parmtype=hw_i2c:intparm=hw_i2c:hw i2c engine enable (0 = disable)parmtype=disp_priority:intparm=disp_priority:Display Priority (0 = auto, 1 = normal, 2 = high)parmtype=audio:intparm=audio:Audio enable (1 = enable)parmtype=tv:intparm=tv:TV enable (0 = disable)parmtype=connector_table:intparm=connector_table:Force connector tableparmtype=test:intparm=test:Run testsparmtype=benchmark:intparm=benchmark:Run benchmarkparmtype=gartsize:intparm=gartsize:Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)parmtype=agpmode:intparm=agpmode:AGP Mode (-1 == PCI)parmtype=vramlimit:intparm=vramlimit:Restrict VRAM for testingparmtype=r4xx_atom:intparm=r4xx_atom:Enable ATOMBIOS modesetting for R4xxparmtype=dynclks:intparm=dynclks:Disable/Enable dynamic clocksparmtype=modeset:intparm=modeset:Disable/Enable modesettingparmtype=no_wb:intparm=no_wb:Disable AGP writeback for scratch registersfirmware=radeon/R520_cp.binfirmware=radeon/RS600_cp.binfirmware=radeon/RS690_cp.binfirmware=radeon/R420_cp.binfirmware=radeon/R300_cp.binfirmware=radeon/R200_cp.binfirmware=radeon/R100_cp.binfirmware=radeon/RV710_me.binfirmware=radeon/RV710_pfp.binfirmware=radeon/RV730_me.binfirmware=radeon/RV730_pfp.binfirmware=radeon/RV770_me.binfirmware=radeon/RV770_pfp.binfirmware=radeon/RS780_me.binfirmware=radeon/RS780_pfp.binfirmware=radeon/RV670_me.binfirmware=radeon/RV670_pfp.binfirmware=radeon/RV635_me.binfirmware=radeon/RV635_pfp.binfirmware=radeon/RV620_me.binfirmware=radeon/RV620_pfp.binfirmware=radeon/RV630_me.binfirmware=radeon/RV630_pfp.binfirmware=radeon/RV610_me.binfirmware=radeon/RV610_pfp.binfirmware=radeon/R600_me.binfirmware=radeon/R600_pfp.binfirmware=radeon/R520_cp.binfirmware=radeon/RS600_cp.binfirmware=radeon/RS690_cp.binfirmware=radeon/R420_cp.binfirmware=radeon/R300_cp.binfirmware=radeon/R200_cp.binfirmware=radeon/R100_cp.binfirmware=radeon/SUMO2_me.binfirmware=radeon/SUMO2_pfp.binfirmware=radeon/SUMO_me.binfirmware=radeon/SUMO_pfp.binfirmware=radeon/SUMO_rlc.binfirmware=radeon/PALM_me.binfirmware=radeon/PALM_pfp.binfirmware=radeon/CYPRESS_rlc.binfirmware=radeon/CYPRESS_me.binfirmware=radeon/CYPRESS_pfp.binfirmware=radeon/JUNIPER_rlc.binfirmware=radeon/JUNIPER_me.binfirmware=radeon/JUNIPER_pfp.binfirmware=radeon/REDWOOD_rlc.binfirmware=radeon/REDWOOD_me.binfirmware=radeon/REDWOOD_pfp.binfirmware=radeon/CEDAR_rlc.binfirmware=radeon/CEDAR_me.binfirmware=radeon/CEDAR_pfp.binfirmware=radeon/R700_rlc.binfirmware=radeon/R600_rlc.binfirmware=radeon/RV710_me.binfirmware=radeon/RV710_pfp.binfirmware=radeon/RV730_me.binfirmware=radeon/RV730_pfp.binfirmware=radeon/RV770_me.binfirmware=radeon/RV770_pfp.binfirmware=radeon/RS780_me.binfirmware=radeon/RS780_pfp.binfirmware=radeon/RV670_me.binfirmware=radeon/RV670_pfp.binfirmware=radeon/RV635_me.binfirmware=radeon/RV635_pfp.binfirmware=radeon/RV620_me.binfirmware=radeon/RV620_pfp.binfirmware=radeon/RV630_me.binfirmware=radeon/RV630_pfp.binfirmware=radeon/RV610_me.binfirmware=radeon/RV610_pfp.binfirmware=radeon/R600_me.binfirmware=radeon/R600_pfp.binfirmware=radeon/ARUBA_rlc.binfirmware=radeon/ARUBA_me.binfirmware=radeon/ARUBA_pfp.binfirmware=radeon/CAYMAN_rlc.binfirmware=radeon/CAYMAN_mc.binfirmware=radeon/CAYMAN_me.binfirmware=radeon/CAYMAN_pfp.binfirmware=radeon/CAICOS_mc.binfirmware=radeon/CAICOS_me.binfirmware=radeon/CAICOS_pfp.binfirmware=radeon/TURKS_mc.binfirmware=radeon/TURKS_me.binfirmware=radeon/TURKS_pfp.binfirmware=radeon/BTC_rlc.binfirmware=radeon/BARTS_mc.binfirmware=radeon/BARTS_me.binfirmware=radeon/BARTS_pfp.binfirmware=radeon/VERDE_rlc.binfirmware=radeon/VERDE_mc.binfirmware=radeon/VERDE_ce.binfirmware=radeon/VERDE_me.binfirmware=radeon/VERDE_pfp.binfirmware=radeon/PITCAIRN_rlc.binfirmware=radeon/PITCAIRN_mc.binfirmware=radeon/PITCAIRN_ce.binfirmware=radeon/PITCAIRN_me.binfirmware=radeon/PITCAIRN_pfp.binfirmware=radeon/TAHITI_rlc.binfirmware=radeon/TAHITI_mc.binfirmware=radeon/TAHITI_ce.binfirmware=radeon/TAHITI_me.binfirmware=radeon/TAHITI_pfp.binalias=pci:v00001002d000099A4sv*sd*bc*sc*i*alias=pci:v00001002d000099A2sv*sd*bc*sc*i*alias=pci:v00001002d000099A0sv*sd*bc*sc*i*alias=pci:v00001002d0000999Dsv*sd*bc*sc*i*alias=pci:v00001002d0000999Csv*sd*bc*sc*i*alias=pci:v00001002d0000999Bsv*sd*bc*sc*i*alias=pci:v00001002d0000999Asv*sd*bc*sc*i*alias=pci:v00001002d00009999sv*sd*bc*sc*i*alias=pci:v00001002d00009998sv*sd*bc*sc*i*alias=pci:v00001002d00009997sv*sd*bc*sc*i*alias=pci:v00001002d00009996sv*sd*bc*sc*i*alias=pci:v00001002d00009995sv*sd*bc*sc*i*alias=pci:v00001002d00009994sv*sd*bc*sc*i*alias=pci:v00001002d00009993sv*sd*bc*sc*i*alias=pci:v00001002d00009992sv*sd*bc*sc*i*alias=pci:v00001002d00009991sv*sd*bc*sc*i*alias=pci:v00001002d00009990sv*sd*bc*sc*i*alias=pci:v00001002d00009919sv*sd*bc*sc*i*alias=pci:v00001002d00009918sv*sd*bc*sc*i*alias=pci:v00001002d00009917sv*sd*bc*sc*i*alias=pci:v00001002d00009913sv*sd*bc*sc*i*alias=pci:v00001002d00009910sv*sd*bc*sc*i*alias=pci:v00001002d0000990Fsv*sd*bc*sc*i*alias=pci:v00001002d0000990Esv*sd*bc*sc*i*alias=pci:v00001002d0000990Dsv*sd*bc*sc*i*alias=pci:v00001002d0000990Csv*sd*bc*sc*i*alias=pci:v00001002d0000990Bsv*sd*bc*sc*i*alias=pci:v00001002d0000990Asv*sd*bc*sc*i*alias=pci:v00001002d00009909sv*sd*bc*sc*i*alias=pci:v00001002d00009908sv*sd*bc*sc*i*alias=pci:v00001002d00009907sv*sd*bc*sc*i*alias=pci:v00001002d00009906sv*sd*bc*sc*i*alias=pci:v00001002d00009905sv*sd*bc*sc*i*alias=pci:v00001002d00009904sv*sd*bc*sc*i*alias=pci:v00001002d00009903sv*sd*bc*sc*i*alias=pci:v00001002d00009901sv*sd*bc*sc*i*alias=pci:v00001002d00009900sv*sd*bc*sc*i*alias=pci:v00001002d0000980Asv*sd*bc*sc*i*alias=pci:v00001002d00009809sv*sd*bc*sc*i*alias=pci:v00001002d00009808sv*sd*bc*sc*i*alias=pci:v00001002d00009807sv*sd*bc*sc*i*alias=pci:v00001002d00009806sv*sd*bc*sc*i*alias=pci:v00001002d00009805sv*sd*bc*sc*i*alias=pci:v00001002d00009804sv*sd*bc*sc*i*alias=pci:v00001002d00009803sv*sd*bc*sc*i*alias=pci:v00001002d00009802sv*sd*b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