ELF>m@@GNUM+ 69ʖ9IAT=USHHXtH1HUHAU[E]D A\USHU=@t1HH1@ǃǃHǃfǃ$fǃ&ǃǃǃǃǃ[[]AUATUSHH=HHHHu HL%IHHHHuH1;m=1H E11HHH9HGH9HBIH9wHs1A H1H IHHD PHHHuHD$HH$1H !L1L;DPwHH HH uH9wL1HHI1LH15H1LH1HH1HH111HuHHlPH9wH HH1H uHĨH1[]A\A]HĨ[]A\A]AUATIUSPE$ 1111Dt~E$$HcMctHkLptZHkLʋA3$u:Lc1Mk%E D3At Eu HA9H jHcHkHI$A$$tfA$&A$&1HkfADŽ$$Hȃ=A$<A$A$ILH‰H1ufA$$t9=tA$HH1fADŽ$$1d=tH1A$LAbt=tPH1@=tH1A$$A$A fA$$A][]A\A]KSHXHuHH1 ;v)H1H[AH8HcH󤋳;u=t[H1[UHS1P HH;P|X[]Ã`Vw- t~w tv^0tfPt_F tKwqtB t8pt$ t tH11YAP=tH1_AULl ATI II LUL)HHSHHHLJPLHHuYPLHHu2H}PLHHuH9HHD$HD$PIHcHPM9r1H[]A\A]ATeH%U1SHHHHHLHHǀHeH%@u H@LteH%beH%HLHHD$HD$H[]A\ATeH%U1SHHHHHLHHǀHeH%@u H@LteH%beH%HLHHD$*HD$H[]A\AVHAUATAUSH9huP;Ps‰P HH=u1EH8Ic̰E1HML8IAE9H1[]A\A]A^AUAATUSHP==?=v15jAA^1ҿAЉ֙AHH8@08HHDDD@1uA][]A\A]AW1҉AVAUATUSHH(%p=0T$ ;hH=0w=t6= =Pq=`=@3`)9rH1)HH<u=H=tH1H+`Lc틋LHL8H‹HH LHL$I$CtHLD$LLLHHcH9HH1H(H<u*=tH1H8HcͰHa=tH1Hu:DHc͋H(H8LH4HH=t7PHʋt1u=tLH8;Ls=t,H=tH1=t =1=fL11t$ >Hh+l9s H؅t H|+t pǃ)=tP1H=tH1E1HuHQHD<t+=tH1DHAD;lreDH(E1N,BK|t7=tH1KtH0KDID;lDr=tD%1 XAHI9uH=tH9huP;PHsHH=u51CH`++9tƉH1H=tH1`HILL4>IIIH<uHװbLLl$LcLLHI$tHLD$LLLHgHc1H9tHH1H8 A H9LD`HLILHL$I$tHLD$LLLHc`H9tHH1BHLl$I$LcLLHtHLD$LLLHHcH9@H(AN$I<$uS=tH1H0PHHI$uH`H󪋋H(HH1H8  H9PEHAʋtA1AD=tH1=t ==t#L11t$ H)D9`u P;PDHv‰PHH=u=tH1ǃn @uH1$=tLH1L#=tLH1L11=tH1H([]A\A]A^A_Ã=DNUSHVHHt[f&ƒ=f&ҋ|tcHHHH1:=tH11H7pt#HyApt&u=tH1ѣup倃@qt/9t)H1倃A=tH1@YH[]qf&H=f&|ǃǃt'HHHH1%= t=w=t =u>=0=@u*`++HYpt_ ǃtwu8 0t#@u,|뼋ǃ3|+HZ[]1ǃǃX[]AUIATAUSHUHXHHtHtH[[]A\A]1puA[[]A\A]HH1t&HIXLPEHʼn)D9|A4;v0H1HAZ[]A\A]AH8HcHDD;D  td%=uRDž;hs=tH1AY[H]A\A]uAX[H]A\A]|_[]A\A]UHHSQBHcHHu1ۃ=Ht=tH1Z[]U1SAPHXHHtHt1H11pu1HH1с0u*=tH1@;9u1Htt ug4uH8@,H8@,P3=tH1@ 9=tH1  t^%=uLǃ;hs=tH1HuH4^[@]AT1U@SHXH1@ƃHXHHtttH[]A\1@X u1=D d ǃ   @=l    uǃ HHǃ`HHD$H|$Ht$1D/AuA0t HEH|$A?:uHt$H1H|$AHD$8,uHHD$ H~HD`DhHBHH@HHD$8THHHD$H|$Ht$1D/AuA0t HH|$A?:uHt$H1H|$AHD$8,uHHD$ HHD`DhHBHH@HHD$8THHHD$H|$Ht$1D/AuA0t HH|$A?:uHt$H1H|$AHD$8,uHHD$ HuHAxHD`DhHBHH@HHD$8AH=1ҾAHu<=tH1AH=AtH1EDO tUHrHHHHH9t HHBHRDщH=HtDHH@1HH<HHuHAH=AH=AHL%L( HttHD$H|$Ht$1D7uA0t HLAuA$ tH1AAHD$8,uHHD$HD$8uD H=H11AtMH H1H=H+H(HuH=HD[]A\A]A^US1UHHXHH8HH=H|H(HuH=[[]<7>[nandsim] debug: read_word STATE_CMD_READ0STATE_CMD_READ1STATE_CMD_PAGEPROGSTATE_CMD_READOOBSTATE_CMD_READSTARTSTATE_CMD_ERASE1STATE_CMD_STATUSSTATE_CMD_STATUS_MSTATE_CMD_SEQINSTATE_CMD_READIDSTATE_CMD_ERASE2STATE_CMD_RESETSTATE_CMD_RNDOUTSTATE_CMD_RNDOUTSTARTSTATE_ADDR_PAGESTATE_ADDR_SECSTATE_ADDR_ZEROSTATE_ADDR_COLUMNSTATE_DATAINSTATE_DATAOUTSTATE_DATAOUT_IDSTATE_DATAOUT_STATUSSTATE_DATAOUT_STATUS_MSTATE_READYSTATE_UNKNOWN<3>[nandsim] error: get_state_name: unknown state, BUG <7>[nandsim] debug: switch_to_ready_state: switch to %s state <3>[nandsim] error: Erase counter total overflow <3>[nandsim] error: Erase counter overflow for erase block %u <6>[nandsim] *** Wear Report *** <6>[nandsim] Total numbers of erases: %lu <6>[nandsim] Number of erase blocks: %u <6>[nandsim] Average number of erases: %lu <6>[nandsim] Maximum number of erases: %lu <6>[nandsim] Minimum number of erases: %lu <6>[nandsim] Number of ebs with erase counts from %lu to %lu : %lu <6>[nandsim] *** End of Wear Report *** <7>[nandsim] debug: find_operation: operation found, index: %d, state: %s, nxstate %s <7>[nandsim] debug: find_operation: no operation found, try again with state %s <7>[nandsim] debug: find_operation: no operations found <7>[nandsim] debug: find_operation: BUG, operation must be known if address is input <7>[nandsim] debug: find_operation: there is still ambiguity <3>[nandsim] error: write_buf: data input isn't expected, state is %s, switch to STATE_READY <3>[nandsim] error: write_buf: too many input bytes <7>[nandsim] debug: write_buf: %d bytes were written <3>[nandsim] error: init_nandsim: nandsim is already initialized <3>[nandsim] error: init_nandsim: unknown page size %u <3>[nandsim] error: too many partitions. <3>[nandsim] error: bad partition size. NAND simulator partition %d<4>[nandsim] warning: 16-bit flashes support wasn't tested flash size: %llu MiB page size: %u bytes OOB area size: %u bytes sector size: %u KiB pages number: %u pages per sector: %u bus width: %u bits in sector size: %u bits in page size: %u bits in OOB size: %u flash size with OOB: %llu KiB page address bytes: %u sector address bytes: %u options: %#x <3>[nandsim] error: alloc_device: cache file not readable <3>[nandsim] error: alloc_device: cache file not writeable <3>[nandsim] error: alloc_device: unable to allocate pages written array <3>[nandsim] error: alloc_device: unable to allocate file buf <3>[nandsim] error: alloc_device: unable to allocate page array nandsim<3>[nandsim] error: cache_create: unable to create kmem_cache <3>[nandsim] error: init_nandsim: unable to allocate %u bytes for the internal buffer <3>[nandsim] error: get_state_by_command: unknown command, BUG <7>[nandsim] debug: device_ready <4>[nandsim] warning: simulating read error in page %u <4>[nandsim] warning: read_page: flipping bit %d in page %d reading from %d ecc: corrected=%u failed=%u <4>[nandsim] warning: do_state_action: wrong page number (%#x) <3>[nandsim] error: do_state_action: column number is too large <7>[nandsim] debug: read_page: page %d not written <7>[nandsim] debug: read_page: page %d written, reading from %d <3>[nandsim] error: read_page: read error for page %d ret %ld <7>[nandsim] debug: read_page: page %d not allocated <7>[nandsim] debug: read_page: page %d allocated, reading from %d <7>[nandsim] debug: do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d <7>[nandsim] log: read page %d <7>[nandsim] log: read page %d (second half) <7>[nandsim] log: read OOB of page %d <3>[nandsim] error: do_state_action: device is write-protected, ignore sector erase <3>[nandsim] error: do_state_action: wrong sector address (%#x) <7>[nandsim] debug: do_state_action: erase sector at address %#x, off = %d <7>[nandsim] log: erase sector %u <7>[nandsim] debug: erase_sector: freeing page %d <4>[nandsim] warning: simulating erase failure in erase block %u <4>[nandsim] warning: do_state_action: device is write-protected, programm <3>[nandsim] error: do_state_action: too few bytes were input (%d instead of %d) <7>[nandsim] debug: prog_page: writing page %d <3>[nandsim] error: prog_page: read error for page %d ret %ld <3>[nandsim] error: prog_page: write error for page %d ret %ld <7>[nandsim] debug: prog_page: allocating page %d <3>[nandsim] error: prog_page: error allocating memory for page %d <7>[nandsim] debug: do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d <7>[nandsim] log: programm page %d <4>[nandsim] warning: simulating write failure in page %u <7>[nandsim] debug: do_state_action: set internal offset to 0 <3>[nandsim] error: do_state_action: BUG! can't skip half of page for non-512byte page size 8x chips <7>[nandsim] debug: do_state_action: set internal offset to %d <7>[nandsim] debug: do_state_action: BUG! unknown action <7>[nandsim] debug: switch_state: operation is known, switch to the next state, state: %s, nxstate: %s <7>[nandsim] debug: switch_state: operation is unknown, try to find it <7>[nandsim] debug: switch_state: double the column number for 16x device <4>[nandsim] warning: switch_state: not all bytes were processed, %d left <7>[nandsim] debug: switch_state: operation complete, switch to STATE_READY state <7>[nandsim] debug: switch_state: the next state is data I/O, switch, state: %s, nxstate: %s <3>[nandsim] error: switch_state: BUG! unknown data state <3>[nandsim] error: switch_state: BUG! unknown address state <3>[nandsim] error: read_buf: chip is disabled <3>[nandsim] error: read_buf: ALE or CLE pin is high <4>[nandsim] warning: read_buf: unexpected data output cycle, current state is %s <3>[nandsim] error: read_buf: too many bytes to read <7>[nandsim] debug: read_buf: switch to the next page (%#x) <7>[nandsim] debug: verify_buf: the buffer is OK <7>[nandsim] debug: verify_buf: the buffer is wrong <3>[nandsim] error: read_byte: chip is disabled, return %#x <3>[nandsim] error: read_byte: ALE or CLE pin is high, return %#x <4>[nandsim] warning: read_byte: unexpected data output cycle, state is %s return %#x <7>[nandsim] debug: read_byte: return %#x status <4>[nandsim] warning: read_byte: no more data to output, return %#x <7>[nandsim] debug: read_byte: read ID byte %d, total = %d /build/linux-5VIh7j/linux-3.2.78/drivers/mtd/nand/nandsim.c<7>[nandsim] debug: read_byte: all bytes were read <7>[nandsim] debug: read_byte: switch to the next page (%#x) <3>[nandsim] error: write_byte: chip is disabled, ignore write <3>[nandsim] error: write_byte: ALE and CLE pins are high simultaneously, ignore write <7>[nandsim] log: reset chip <4>[nandsim] warning: write_byte: command (%#x) wasn't expected, expected state is %s, ignore previous states <7>[nandsim] debug: command byte corresponding to %s state accepted <7>[nandsim] debug: write_byte: operation isn't known yet, identify it <3>[nandsim] error: write_byte: address (%#x) isn't expected, expected state is %s, switch to STATE_READY <3>[nandsim] error: write_byte: no more address bytes expected <7>[nandsim] debug: write_byte: address byte %#x was accepted (%d bytes input, %d expected) <7>[nandsim] debug: address (%#x, %#x) is accepted <3>[nandsim] error: write_byte: data input (%#x) isn't expected, state is %s, switch to %s <4>[nandsim] warning: write_byte: %u input bytes has already been accepted, ignore write <3>[nandsim] error: write_byte: unknown command %#x <3>[nandsim] error: wrong bus width (%d), use only 8 or 16 <3>[nandsim] error: unable to allocate core structures. <3>[nandsim] error: bbt has to be 0..2 <3>[nandsim] error: invalid weakblocks. <3>[nandsim] error: unable to allocate memory. <3>[nandsim] error: invalid weakpagess. <3>[nandsim] error: invalid gravepagess. <3>[nandsim] error: cannot scan NAND Simulator device <3>[nandsim] error: BCH ECC support is disabled <3>[nandsim] error: can't register NAND Simulator <3>[nandsim] error: overridesize is too big <3>[nandsim] error: Too many erase blocks for wear reporting <3>[nandsim] error: invalid badblocks. description=The NAND flash simulatorauthor=Artem B. Bityuckiylicense=GPLparm=bch:Enable BCH ecc and set how many bits should be correctable in 512-byte blocksparm=bbt:0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data areaparm=cache_file:File to use to cache nand pages instead of memoryparm=overridesize:Specifies the NAND Flash size overriding the ID bytes. The size is specified in erase blocks and as the exponent of a power of two e.g. 5 means a size of 32 erase blocksparm=rptwear:Number of erases between reporting wear, if not zeroparm=gravepages:Pages that lose data [: maximum reads (defaults to 3)] separated by commas e.g. 1401:2 means page 1401 can be read only twice before failingparm=bitflips:Maximum number of random bit flips per page (zero by default)parm=weakpages:Weak pages [: maximum writes (defaults to 3)] separated by commas e.g. 1401:2 means page 1401 can be written only twice before failingparm=weakblocks:Weak erase blocks [: remaining erase cycles (defaults to 3)] separated by commas e.g. 113:2 means eb 113 can be erased only twice before failingparm=badblocks:Erase blocks that are initially marked bad, separated by commasparm=parts:Partition sizes (in erase blocks) separated by commasparm=dbg:Output debug information if not zeroparm=log:Perform logging if not zeroparm=do_delays:Simulate NAND delays using busy-waits if not zeroparm=bus_width:Chip's bus width (8- or 16-bit)parm=input_cycle:Word input (to flash) time (nanoseconds)parm=output_cycle:Word output (from flash) time (nanoseconds)parm=erase_delay:Sector erase delay (milliseconds)parm=programm_delay:Page programm delay (microsecondsparm=access_delay:Initial page access delay (microseconds)parm=fourth_id_byte:The fourth byte returned by NAND Flash 'read ID' commandparm=third_id_byte:The third byte returned by NAND Flash 'read ID' commandparm=second_id_byte:The second byte returned by NAND Flash 'read ID' command (chip ID)parm=first_id_byte:The first byte returned by NAND Flash 'read ID' command (manufacturer ID)parmtype=bch:uintparmtype=bbt:uintparmtype=cache_file:charpparmtype=overridesize:uintparmtype=rptwear:uintparmtype=gravepages:charpparmtype=bitflips:uintparmtype=weakpages:charpparmtype=weakblocks:charpparmtype=badblocks:charpparmtype=parts:array of ulongparmtype=dbg:uintparmtype=log:uintparmtype=do_delays:uintparmtype=bus_width:uintparmtype=input_cycle:uintparmtype=output_cycle:uintparmtype=erase_delay:uintparmtype=programm_delay:uintparmtype=access_delay:uintparmtype=fourth_id_byte:uintparmtype=third_id_byte:uintparmtype=second_id_byte:uintparmtype=first_id_byte:uintdepends=nand,mtd,nand_idsintree=Yvermagic=3.2.0-4-amd64 SMP mod_unload modversions bchbbtcache_fileoverridesizerptweargravepagesbitflipsweakpagesweakblocksbadblocksparts dbglogdo_delaysbus_widthinput_cycleoutput_cycleerase_delayprogramm_delayaccess_delayfourth_id_bytethird_id_bytesecond_id_bytefirst_id_byteVmodule_layout1lŢparam_ops_ulongYparam_array_opsƂrparam_ops_charpȇparam_ops_uint_43Cnand_releaseOnmtd_device_parse_register;w<nand_default_bbtC"nand_scan_tail4nand_scan_ident) simple_strtoul/memcmp{kmem_cache_alloc__const_udelayk}__udelayJnrandom32"a=vfs_writeFvfs_read!current_taskOLkernel_stackj}Jqunlock_pagewrite_inode_now#Cfind_or_create_pageJSfind_get_page__stack_chk_failn4Jkmem_cache_createhvmalloc\4Z__kmallocI@vzallocPh!filp_openrknand_flash_idskstrdupSqsprintfnkmem_cache_destroy]kmem_cache_freeQ{filp_closevfree<put_pageI'printk zkfree92(@@P`   @  P  `  00@ @  0nandsimGCC: (Debian 4.6.3-14) 4.6.3GCC: (Debian 4.6.3-14) 4.6.3nandsim.koH.symtab.strtab.shstrtab.note.gnu.build-id.rela.text.rela.text.unlikely.rela.init.text.rela.exit.text.rodata.str1.1.rela__bug_table.modinfo.rela__param.rela.rodata__versions.rela.data.rela.gnu.linkonce.this_module.bss.comment.note.GNU-stack.gnu_debuglink@$3d.(>,T 9 R(|MпXb.e](m2a/O|` @O Y`]V H`^ `hh0jH0l0l<lll`u0    0P#/(@CR0VeC{HP V`l0(5p  &; K\m1J  @D$(,@D 8`3@ASH`|oy}X`he %  % ? . KW; IH B\ -r B + L   KO A . %  .A o/2 :G >] 3r I6 ; M K RW ]  + < HX *p@   D`   _ ( u3 F0 ] s @   P   `  1  Cp Y l@ zz   `  "   4  ! 7 L N ` v d    ~        0  H  d @ {    `      ,   G  ] (w  $   8  A   H   ` (  5  z D  3  T ^ h q   H    e     |! 1 B S [ P h t              # ) 6 E P _ g t ~ free_listsweak_blocksweak_pagesgrave_pageserase_block_wearns_nand_read_worddbgget_state_nameswitch_to_ready_stateupdate_weartotal_wearrptwear_cntrptwearwear_eb_countfind_operationopsns_nand_write_bufput_pagesfree_deviceinit_nandsimparts_numpartssecond_id_bytecache_fileget_state_by_commandns_device_readyget_pages.isra.6read_file.part.7write_file.part.8kzalloc.constprop.12bitflipsnsmtddo_state_actionlogdo_delaysaccess_delayinput_cycleerase_delayprogramm_delayoutput_cycleswitch_statens_nand_read_bufns_nand_verify_bufns_verify_bufns_nand_read_bytens_hwcontrolns_init_modulebus_widthbbtthird_id_bytefourth_id_bytefirst_id_byteweakblocksweakpagesgravepagesbchoverridesizebadblocksns_cleanup_module__mod_description2422__mod_author2421__mod_license2420__mod_bch172__mod_bbt170__mod_cache_file169__mod_overridesize168__mod_rptwear165__mod_gravepages164__mod_bitflips161__mod_weakpages160__mod_weakblocks157__mod_badblocks154__mod_parts152__mod_dbg151__mod_log150__mod_do_delays149__mod_bus_width148__mod_input_cycle147__mod_output_cycle146__mod_erase_delay145__mod_programm_delay144__mod_access_delay143__mod_fourth_id_byte142__mod_third_id_byte141__mod_second_id_byte140__mod_first_id_byte139__mod_bchtype137__param_bch__param_str_bch__mod_bbttype136__param_bbt__param_str_bbt__mod_cache_filetype135__param_cache_file__param_str_cache_file__mod_overridesizetype134__param_overridesize__param_str_overridesize__mod_rptweartype133__param_rptwear__param_str_rptwear__mod_gravepagestype132__param_gravepages__param_str_gravepages__mod_bitflipstype131__param_bitflips__param_str_bitflips__mod_weakpagestype130__param_weakpages__param_str_weakpages__mod_weakblockstype129__param_weakblocks__param_str_weakblocks__mod_badblockstype128__param_badblocks__param_str_badblocks__mod_partstype127__param_parts__param_str_parts__param_arr_parts__mod_dbgtype126__param_dbg__param_str_dbg__mod_logtype125__param_log__param_str_log__mod_do_delaystype124__param_do_delays__param_str_do_delays__mod_bus_widthtype123__param_bus_width__param_str_bus_width__mod_input_cycletype122__param_input_cycle__param_str_input_cycle__mod_output_cycletype121__param_output_cycle__param_str_output_cycle__mod_erase_delaytype120__param_erase_delay__param_str_erase_delay__mod_programm_delaytype119__param_programm_delay__param_str_programm_delay__mod_access_delaytype118__param_access_delay__param_str_access_delay__mod_fourth_id_bytetype117__param_fourth_id_byte__param_str_fourth_id_byte__mod_third_id_bytetype116__param_third_id_byte__param_str_third_id_byte__mod_second_id_bytetype115__param_second_id_byte__param_str_second_id_byte__mod_first_id_bytetype114__param_first_id_byte__param_str_first_id_byte.LC130__module_depends____versions__mod_intree17__mod_vermagic5filp_openvfs_write__udelayparam_ops_uintparam_ops_ulong__this_modulefind_get_pagenand_flash_idsput_pagecleanup_moduleparam_array_opskfreekmem_cache_createmtd_device_parse_registerinit_modulenand_scan_ident__stack_chk_failkmem_cache_allocvzallocdo_bit_flipsunlock_pagekmem_cache_freedo_read_errorfind_or_create_pagewrite_inode_nowmemcmpnand_default_bbtprintkcurrent_taskrandom32nand_scan_tailvfs_readparam_ops_charpkstrdupsprintfvfreenand_release__const_udelayfilp_closesimple_strtoulvmallockernel_stack__kmallockmem_cache_destroy+ !K+X_ i#DD @$: rAGLOULaHkt$$ #- 4:A HR *Yc Vjt {   ` d- dX dh ` d+ d h' .I+Y` rj+ + + RNU _y + #  +   !4De    8 g    & 7  > _ k |      , S    +   + J  #    +   +    V \ + C  ;  ;  ;   ?   ?, $; N } i +   ;  )+3 :+ ?(#, L% 03I v }+ ,O \ l+v }  R4:;J QW?`<ek?@L  P+  M +% .>+N Um+w ~++  -&+6 =+  (+ s T+   $h _   P VW+ ? @R @Zf+n x+  0 m +& -R 9+ ~+ :+J *Q h ;& - 7+JQ [+ ES Zv }+ + "3AR VYk   r,7D 0ML P $   R /0 = N d[ ?m  x     5    & E  r1 W: dO ^ g v }N YS k$ 5 AT &apl  &  ( . B5C ~N[ bo v      ' > T+ s2? FS Za|y   * ! t &2Wj       ; 7  P  A,;F HQ }^    0  8  4q~ T  "AF Q,h 0o,\ 7F L) P0LEdg{ `F   %1 9C P\ao v %F !$* R5AFX]ov  '18=N^ch"*16DTYa 6 (8@HX`hx(0h@P``X p(8@zHX`hx0@D(D (8,@HX@`hx$(8 Hp0080PPXPH8